One more comment.
/* Write high word.
FIXME: this is a kludge! */
v.u.bits[1] &= 0x3ffff;
This seems not be necessary.
v is got by stf.spill,
stf.spill makes sure the high 47 bits of v.u.bits[1] is 0.
Thanks,
-Anthony
>-----Original Message-----
>From: Tristan Gingold [mailto:Tristan.Gingold@xxxxxxxx]
>Sent: 2006?4?20? 21:16
>To: Xu, Anthony; xen-ia64-devel@xxxxxxxxxxxxxxxxxxx; Alex Williamson
>Subject: Re: [Xen-ia64-devel] PATCH [resend]: more case handled in mmio.c
>
>Le Jeudi 20 Avril 2006 06:28, Xu, Anthony a écrit :
>> From: Tristan Gingold
>>
>> >Sent: 2006?4?18? 16:44
>> >Correct, but this doesn't happen in the mmio case, because fp_reg_disabled
>> > is tested before doing the memory access.
>>
>> I didn't find where fp_reg_disabled is tested:-)
>The processor does it.
>
>> If we only emulate stf.spill and stf8, yes fp fault doesn't happen.
>Yes.
>
>> But if we need to emulate ldf, definitely fp fault will happen,
>Yes, but in this case we don't call vcpu_get_fpreg!
>
>> The sequence of emulating ldf maybe,
>> Mmio_access( , , , , ,IOREQ_READ)
>> Vcpu_set_fpreg( )
>> Mmio_access will cause domain_switch,
>> When switch back, psr.dfh is set,
>> Then when executing vcpu_set_fpreg, fp fault happens.
>>
>> And I had found Xwindow use ldfp8 instruction to access frame buffer.
>> BTW, Where did you find stf.spill and stf8 are used to access mmio?
>memset.
>
>> Can we address this issue like below?
>> #ifdef XEN
>> #define ia64_fph_enable()
>> #define ia64_fph_disable()
>> #else
>> #define ia64_fph_enable() do { ia64_rsm(IA64_PSR_DFH); ia64_srlz_d(); }
>> while (0) #define ia64_fph_disable() do { ia64_ssm(IA64_PSR_DFH);
>> ia64_srlz_d(); } while (0) #endif //XEN
>>
>> This makes sure there is no fp fault happening within xen.
>I am quiet sure we need the ia64_fph_enable before saving fp regs!
>
>> Yes later on if we want to use lazy fp algorithm within xen,
>> we should revisit this.
>Sure.
>
>Thanks,
>Tristan.
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