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[Xen-devel] [PATCH 09/17] xen: bind pirq to vector and event channel

To: Ingo Molnar <mingo@xxxxxxx>
Subject: [Xen-devel] [PATCH 09/17] xen: bind pirq to vector and event channel
From: Jeremy Fitzhardinge <jeremy@xxxxxxxx>
Date: Wed, 27 May 2009 00:37:22 -0700
Cc: Chris Wright <chrisw@xxxxxxxxxx>, Jeremy Fitzhardinge <jeremy@xxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxx>, Ky Srinivasan <ksrinivasan@xxxxxxxxxx>, kurt.hackel@xxxxxxxxxx, the arch/x86 maintainers <x86@xxxxxxxxxx>, Linux Kernel Mailing List <linux-kernel@xxxxxxxxxxxxxxx>, Jeremy Fitzhardinge <jeremy.fitzhardinge@xxxxxxxxxx>, Avi Kivity <avi@xxxxxxxxxx>, Jens Axboe <jens.axboe@xxxxxxxxxx>, Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>, Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>, Greg KH <gregkh@xxxxxxx>
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Having converting a dev+pin to a gsi, and that gsi to an irq, and
allocated a vector for the irq, we must program the IO APIC to deliver
an interrupt on a pin to the vector, so Xen can deliver it as an event
channel.

Given the pirq, we can get the gsi and vector.  We map the gsi to a
specific IO APIC's pin, and set the routing entry.

(We were passing the ACPI triggering and polarity levels directly into
the apic - but they have reversed values.  The result was that
all the level-triggered interrupts were edge, and vice-versa.
It's surprising that anything worked at all, but now AHCI works
for me.

Thanks for Gerd Hoffmann for noticing this.)

[ Impact: program IO APICs under Xen ]

Diagnosed-by: Gerd Hoffmann <kraxel@xxxxxxxxxx>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@xxxxxxxxxx>
---
 arch/x86/xen/apic.c |    2 ++
 arch/x86/xen/pci.c  |   33 +++++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+), 0 deletions(-)

diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c
index 8ae563c..35a8af7 100644
--- a/arch/x86/xen/apic.c
+++ b/arch/x86/xen/apic.c
@@ -4,6 +4,7 @@
 
 #include <asm/io_apic.h>
 #include <asm/acpi.h>
+#include <asm/hw_irq.h>
 
 #include <asm/xen/hypervisor.h>
 #include <asm/xen/hypercall.h>
@@ -13,6 +14,7 @@
 
 static void __init xen_io_apic_init(void)
 {
+       enable_IO_APIC();
 }
 
 static unsigned int xen_io_apic_read(unsigned apic, unsigned reg)
diff --git a/arch/x86/xen/pci.c b/arch/x86/xen/pci.c
index f450007..af4e898 100644
--- a/arch/x86/xen/pci.c
+++ b/arch/x86/xen/pci.c
@@ -2,6 +2,8 @@
 #include <linux/acpi.h>
 #include <linux/pci.h>
 
+#include <asm/mpspec.h>
+#include <asm/io_apic.h>
 #include <asm/pci_x86.h>
 
 #include <asm/xen/hypervisor.h>
@@ -11,6 +13,32 @@
 
 #include "xen-ops.h"
 
+static void xen_set_io_apic_routing(int irq, int trigger, int polarity)
+{
+       int ioapic, ioapic_pin;
+       int vector, gsi;
+       struct IO_APIC_route_entry entry;
+
+       gsi = xen_gsi_from_irq(irq);
+       vector = xen_vector_from_irq(irq);
+
+       ioapic = mp_find_ioapic(gsi);
+       if (ioapic == -1) {
+               printk(KERN_WARNING "xen_set_ioapic_routing: irq %d gsi %d 
ioapic %d\n",
+                       irq, gsi, ioapic);
+               return;
+       }
+
+       ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
+
+       printk(KERN_INFO "xen_set_ioapic_routing: irq %d gsi %d vector %d 
ioapic %d pin %d triggering %d polarity %d\n",
+               irq, gsi, vector, ioapic, ioapic_pin, trigger, polarity);
+
+       setup_ioapic_entry(ioapic, -1, &entry, ~0, trigger, polarity, vector,
+                          ioapic_pin);
+       ioapic_write_entry(ioapic, ioapic_pin, entry);
+}
+
 int xen_register_gsi(u32 gsi, int triggering, int polarity)
 {
        int irq;
@@ -25,6 +53,11 @@ int xen_register_gsi(u32 gsi, int triggering, int polarity)
 
        printk(KERN_DEBUG "xen: --> irq=%d\n", irq);
 
+       if (irq > 0)
+               xen_set_io_apic_routing(irq,
+                                       triggering == ACPI_EDGE_SENSITIVE ? 0 : 
1,
+                                       polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
+
        return irq;
 }
 
-- 
1.6.0.6


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