This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
Home Products Support Community News


RE: [Xen-devel] [PATCH] "lock cmpxch8b" and split locks

To: "Nakajima, Jun" <jun.nakajima@xxxxxxxxx>, "Keir Fraser" <Keir.Fraser@xxxxxxxxxxxx>
Subject: RE: [Xen-devel] [PATCH] "lock cmpxch8b" and split locks
From: "Puthiyaparambil, Aravindh" <aravindh.puthiyaparambil@xxxxxxxxxx>
Date: Tue, 11 Oct 2005 10:13:12 -0400
Cc: "Koren, Bradley J" <Bradley.Koren@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxx, "Vessey, Bruce A" <Bruce.Vessey@xxxxxxxxxx>, "Subrahmanian, Raj" <raj.subrahmanian@xxxxxxxxxx>
Delivery-date: Tue, 11 Oct 2005 14:10:51 +0000
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
Thread-index: AcXLHD6wmrUxk2A3T0umIie1UiLYbQAV48kwAL56EOA=
Thread-topic: [Xen-devel] [PATCH] "lock cmpxch8b" and split locks

I ended up writing a module which checked the IA32_MISC_ENABLE MSR on my
system. I found that it was being set incorrectly for some logical
processors. Bringing up a DomU (prior to fixing up the pfn_info
structure) on one of these processors was the reason why the alignment
check was being thrown.  
This was on a test system which was running a beta BIOS. So thank you
for helping us find this bug. I owe you a beer at the next Xen summit.


> -----Original Message-----
> From: Nakajima, Jun [mailto:jun.nakajima@xxxxxxxxx]
> Sent: Friday, October 07, 2005 3:21 PM
> To: Keir Fraser; Puthiyaparambil, Aravindh
> Cc: Koren, Bradley J; xen-devel@xxxxxxxxxxxxxxxxxxx; Subrahmanian,
> Vessey, Bruce A
> Subject: RE: [Xen-devel] [PATCH] "lock cmpxch8b" and split locks
> Keir Fraser wrote:
> > Nice try, but the first sentence of your quote applies only to
> > ordinary (non-LOCKed) memory accesses. Section states that
> > "The integrity of a bus lock is not affected by the alignment of the
> > memory field. The LOCK semantics are followed for as many bus cycles
> > as necessary to update the entire operand."
> >
> > I'm sure you get away with this in practise. 64-bit quantities are
> > only simple type that does not get naturally aligned in x86 C ABI.
> > cmpxchg8b is a pretty rare instruction and most users would be very
> > careful to ensure correct alignment in the cases it is used. Luckily
> > it was easy for us to make the necessary changes too.
> But we don't want to see unexpected #AC in ring0. Can check the bit 4
> (Split-Lock Disable) and 8 (Suppress Lock Enable) of IA32_MISC_ENABLE
> MSR (0x1a0)? You may have set the bit 4. You want to set the bit 8,
> bit 4.

Xen-devel mailing list

<Prev in Thread] Current Thread [Next in Thread>