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Re: [Xen-devel] [PATCH] "lock cmpxch8b" and split locks

On 5 Oct 2005, at 22:46, Keir Fraser wrote:

Does anyone know if there are other places where the "lock" prefix is
used with a cache misaligned address?

x86 systems are supposed to guarantee that LOCKed instructions access their memory operand atomically, regardless of alignment (Vol 3 of the Intel reference manual). Your systems break this application-visible guarantee?

Also, the patch is way bigger and more invasive than it needs to be. There should be no need to make pfn_info bigger than it is. It's currently a multiple of 8 bytes (e.g., 24 bytes on 32-bit) which is sufficient to avoid cache-line crossing of aligned 8-byte quantities.

What if we just move 'tlbflush_timestamp' to the end of the structure? A one-line fix? :-)

 -- Keir

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