This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
Home Products Support Community News


Re: [Xen-devel] [PATCH] x86/hvm: accelerate I/O intercept handling

To: "Cui, Dexuan" <dexuan.cui@xxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] x86/hvm: accelerate I/O intercept handling
From: Andre Przywara <andre.przywara@xxxxxxx>
Date: Wed, 31 Mar 2010 12:08:08 +0200
Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxx>, Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Delivery-date: Wed, 31 Mar 2010 03:09:11 -0700
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
In-reply-to: <ED3036A092A28F4C91B0B4360DD128EABE0C080F@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
References: <4BB30C2A.4020408@xxxxxxx> <ED3036A092A28F4C91B0B4360DD128EABE0C080F@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
User-agent: Thunderbird (X11/20090329)
Cui, Dexuan wrote:
Actually in 15425:6e934c799051, VMX  once enabled the feature, but IIRC,
later Keir removed that in some cleanup patches and let the
EXIT_REASON_IO_INSTRUCTION handler invoke handle_mmio() also -- I don't
remember how people commented the slowness of IN/OUT emulation caused
the change...

If I got this correctly, 15425 introduces only the OUTS/INS segment decoding feature, something that SVM does not have (yet ;-) As I said in my mail, I doubt the usefulness of the shortcut in this case, since it would require to access the guest memory and is used very rarely. So for the sake of a saner implementation I would avoid utilizing this feature, it simplifies the code much and avoids code duplication. That's why my code just implements non-string instructions.

One thing is: IIRC, old Intel CPUs don't supply the info, but your
> patch doesn't check that... so your patch can break the CPUs.
> Please refer to 15425.
But this is only true for the segment decoding part, right? Appendix G of the Intel 3B manual only speaks of _this_ feature protected by bit 54 of IA32_VMX_BASIC MSR. Is the information shown in table 23-5 in section 23.2.1 not valid on all CPUs? If not, where can I check the support for this?


Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
Tel: +49 351 448-3567-12

Xen-devel mailing list

<Prev in Thread] Current Thread [Next in Thread>