Re: [Xen-devel] pvops-2.6.32 - Interrupt routing problem

["Jan Beulich" <JBeulich@xxxxxxxxxx>]

>>> Bastian Blank <waldi@xxxxxxxxxx> 23.03.10 13:37 >>>
>On Tue, Mar 23, 2010 at 11:37:56AM +0000, Jan Beulich wrote:
>> >>> Bastian Blank <waldi@xxxxxxxxxx> 21.03.10 22:47 >>>
>> >Okay, I think I found another problem. Currently the setup looks like
>> >this:
>> >- PHYSDEVOP_setup_gsi: set trigger and polarity, unmask pin
>> Where are you seeing this? Other than Linux' (unmasking edge
>> triggered IRQs), Xen's io_apic_set_pci_routing() always masks the
>> entry afaics.
>
>In the Linux kernel, xen_register_gsi (arch/x86/xen/pci.c). The io-apic

Ah, okay. The way you wrote it I read that PHYSDEVOP_setup_gsi
would do the unmasking. And looking at xen_register_gsi(), I can't
really see where it would unmask the interrupt either. The only place
I see it getting unmasked is in startup_pirq() (through
EVTCHNOP_bind_pirq).

>support in Xen is a copy of the Linux code and behaves similar.

Mostly, but not in all details.

>> >- PHYSDEVOP_map_pirq: map to pirq, set irq handler to guest
>> >If an interrupt fires between this two calles, what happens?
>> Since this is only for edge triggered IRQs, I believe the purpose is
>> to not lose an edge when first enabling the interrupt.
>
>No. The interrupt setup is always done before the device setup. This is
>core kernel functionality.

Yes. But that is unrelated to the choice of keeping masked/unmasking
certain interrupts.

>Please explain why you think this is restricted to edge triggered. This
>is called from the PCI interrupt setup, and usualy used with level
>triggered interrupts.

This is simply what Linux does (at the end of setup_ioapic_entry()).

Jan


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