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Re: [Xen-devel] pvops-2.6.32 - Interrupt routing problem

To: "Bastian Blank" <waldi@xxxxxxxxxx>
Subject: Re: [Xen-devel] pvops-2.6.32 - Interrupt routing problem
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Tue, 23 Mar 2010 11:37:56 +0000
Cc: Jeremy Fitzhardinge <jeremy@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, Keir Fraser <keir.fraser@xxxxxxxxxxxxx>, Xiantao Zhang <xiantao.zhang@xxxxxxxxx>, Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
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>>> Bastian Blank <waldi@xxxxxxxxxx> 21.03.10 22:47 >>>
>On Fri, Mar 19, 2010 at 01:13:41PM +0100, Bastian Blank wrote:
>> The real fix could be:
>> - Allow the hypervisor to lock interrupts it uses. Zero would be in it by
>>   default. The interrupt for the used serial interface would be added.
>>   All other pins are free to be programmed by the kernel once.
>> - Don't do register_gsi calls from the initial setup in the kernel if no
>>   ACPI override is present, only setup the rest.
>Okay, I think I found another problem. Currently the setup looks like
>- PHYSDEVOP_setup_gsi: set trigger and polarity, unmask pin

Where are you seeing this? Other than Linux' (unmasking edge
triggered IRQs), Xen's io_apic_set_pci_routing() always masks the
entry afaics.

>- PHYSDEVOP_map_pirq: map to pirq, set irq handler to guest
>If an interrupt fires between this two calles, what happens?

Since this is only for edge triggered IRQs, I believe the purpose is
to not lose an edge when first enabling the interrupt. When one
occurs before the handler got set up, the fact that there was one
is just getting latched into desc->status, and the IRQ gets


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