On Tue, Mar 23, 2010 at 11:37:56AM +0000, Jan Beulich wrote:
> >>> Bastian Blank <waldi@xxxxxxxxxx> 21.03.10 22:47 >>>
> >Okay, I think I found another problem. Currently the setup looks like
> >this:
> >- PHYSDEVOP_setup_gsi: set trigger and polarity, unmask pin
> Where are you seeing this? Other than Linux' (unmasking edge
> triggered IRQs), Xen's io_apic_set_pci_routing() always masks the
> entry afaics.
In the Linux kernel, xen_register_gsi (arch/x86/xen/pci.c). The io-apic
support in Xen is a copy of the Linux code and behaves similar.
> >- PHYSDEVOP_map_pirq: map to pirq, set irq handler to guest
> >If an interrupt fires between this two calles, what happens?
> Since this is only for edge triggered IRQs, I believe the purpose is
> to not lose an edge when first enabling the interrupt.
No. The interrupt setup is always done before the device setup. This is
core kernel functionality.
Please explain why you think this is restricted to edge triggered. This
is called from the PCI interrupt setup, and usualy used with level
triggered interrupts.
Bastian
--
I have never understood the female capacity to avoid a direct answer to
any question.
-- Spock, "This Side of Paradise", stardate 3417.3
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