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xen-devel
Re: [Xen-devel] Two shadow page tables for HVM
I'm using 64-bit PT's and as far as I
can tell EFER.NXE is turned on. At least cpu_has_nx returns true and
that I get page faults with PFEC_instr_fetch error with both paging modes.
Here is the summary of page fault errors:
...
(XEN) sh_page_fault: d:v=1:0 va=0xffffffffa000f050 err=17,
rip=ffffffffa000f050
(XEN) <ECS> Switching to ALTERNATE paging mode
(XEN) <ECS-alt> sh_page_fault: d:v=1:0 va=0xffffffff8062cef0 err=0,
rip=ffffffffa000f050
(XEN) <ECS-alt> sh_page_fault: d:v=1:0 va=0xffffffff805d8010 err=0,
rip=ffffffffa000f050
(XEN) <ECS-alt> sh_page_fault: d:v=1:0 va=0xffffffff8020cea0 err=10,
rip=ffffffff8020cea0
(XEN) <ECS> Switching to NORMAL paging mode
(XEN) <ECS> Done
...
I'm also confused about the last page fault. No page fault occurred
that propagated this page's pte from the guest (I turned off
prefetching). I'm inclined to think that I have some artifacts from the
initial paging mode.
Seems like a fair explanation.
The intel software development manual states:
P flag = 0 --> PF due to page not present
P flag = 1 --> PF due to protection violation
If this flag is used as it is, it would explain the error code being 0.
I'm looking into why there isn't another instruction fetch.
John
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