At 19:39 -0500 on 26 Jan (1232998748), Emre Can Sezer wrote:
> Unfortunately I'm still stuck with the same problem. When in normal
> mode, I observe the instruction fetch error when execution is jumping to
> a module. The va and rip are the same. I switch to "alternate" paging
> mode. Since the TLB is empty, I expect the guest to try to fetch the
> instruction again. At this point the root shadow page table is empty
> (first time we ever switched to this mode), so I only expect to get a
> page not present error, since the NX bit is not set. Well, I don't see
> either. It faults with error code 0 and a va that is different from the
> rip (rip is the same as before).
Mysterious! Does this address line up with any of the other register
or descriptor state?
> I'm using 64-bit PT's and as far as I
> can tell EFER.NXE is turned on. At least cpu_has_nx returns true and
> that I get page faults with PFEC_instr_fetch error with both paging modes.
>
> Here is the summary of page fault errors:
> ...
> (XEN) sh_page_fault: d:v=1:0 va=0xffffffffa000f050 err=17,
> rip=ffffffffa000f050
> (XEN) <ECS> Switching to ALTERNATE paging mode
> (XEN) <ECS-alt> sh_page_fault: d:v=1:0 va=0xffffffff8062cef0 err=0,
> rip=ffffffffa000f050
> (XEN) <ECS-alt> sh_page_fault: d:v=1:0 va=0xffffffff805d8010 err=0,
> rip=ffffffffa000f050
> (XEN) <ECS-alt> sh_page_fault: d:v=1:0 va=0xffffffff8020cea0 err=10,
> rip=ffffffff8020cea0
> (XEN) <ECS> Switching to NORMAL paging mode
> (XEN) <ECS> Done
> ...
>
> I'm also confused about the last page fault. No page fault occurred
> that propagated this page's pte from the guest (I turned off
> prefetching). I'm inclined to think that I have some artifacts from the
> initial paging mode.
Seems like a fair explanation.
> The only thing I haven't fully ported to the alternate paging mode is
> the super page handling. But I'm not sure if that has anything to do
> with the error code.
I can't see why it should have.
> Any thoughts? Am I correct in thinking that when I first switch the
> paging mode, the top level page table is empty and that we should at
> least get a page not present error for ANY instruction?
That is what I would expect. If you're not seeing that then either the
TLB's not being flushed or your shadows are leaking from one mode to
another. Obviously, on subsequent switches to the alternate mode,
you'll have partially filled shadows and patterns like the one above
would be quite reasonable.
Cheers,
Tim.
--
Tim Deegan <Tim.Deegan@xxxxxxxxxx>
Principal Software Engineer, Citrix Systems (R&D) Ltd.
[Company #02300071, SL9 0DZ, UK.]
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