RE: [Xen-devel] [PATCH][VT]vga acceleration for cirrus logic device model

["Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>]

Keir Fraser wrote:
> On 23 Sep 2005, at 10:25, Jiang, Yunhong wrote:
> 
>> This patch add VGA acceleration support for cirrus logic device
>> model. It works on 32 guest under 32/64 host env.
> 
> Why do you modify xc_vmx_build to unconditionally fill in all 4
> entries of the PAE PDPT?
> 
>   -- Keir

Currently on xc_vmx_build, the page_array is used as following , assume
the memory is 128M:
the first one used for l3 table.
the second one will be used for l2 table.
the third one and following will be used for l1 table.

When we setup the memory mapping for cirrus logic, it is on high end
memory and will not be on the first l2 table.
At that time, we have two options:
1) Using this patch, setup the l2 table unconditionally on xc_vmx_build.
2) Re-caculating the page array usage, and caculating which page can be
used for the l2 table.

I select the option 1 because, the second method will makes the l2 table
scattered. While with option 1, the page array usage will be clear, at
least will be helpful for debug , for example,  we can caculate the 1:1
page table more easily as following :-)
first one for l3 table
followed 4 (or 1 when 2 level) for l2 table
followed is l1 table.

So how is you opinion? Maybe I should split that part as a seperated
patch, although it is caused by the vga acceleration change.

Thanks
Yunhong Jiang



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