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[Xen-devel] Re: [PATCH] AMD IOMMU: Fix an interrupt remapping issue

To: "Wei Wang2" <wei.wang2@xxxxxxx>
Subject: [Xen-devel] Re: [PATCH] AMD IOMMU: Fix an interrupt remapping issue
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Fri, 08 Apr 2011 12:26:34 +0100
Cc: Boris Ostrovsky <boris.ostrovsky@xxxxxxx>, Wei Huang2 <Wei.Huang2@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
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>>> On 08.04.11 at 12:52, Wei Wang2 <wei.wang2@xxxxxxx> wrote:
> Some device could generate bogus interrupts if an IO-APIC RTE and an iommu 
> interrupt remapping entry are not consistent during 2 adjacent 64bits IO-APIC 
> RTE updates. For example, if the 2nd operation updates destination bits in 
> RTE for SATA device and unmask it, in some case, SATA device will assert 
> ioapic pin to generate interrupt immediately using new destination but iommu 
> could still translate it into the old destination, then dom0 would be 
> confused. To fix that, we sync up interrupt remapping entry with IO-APIC IRE 
> on every 32 bits operation and foward IOAPIC RTE updates after interrupt 
> remapping table has been changed. 
> Jan, This patch fixes SATA device issue we observed (Bug #680824), please 
> review it. Thanks! 

Sure - once you attach the actual patch ;-)


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