|   | 
      | 
  
  
      | 
      | 
  
 
     | 
    | 
  
  
     | 
    | 
  
  
    |   | 
      | 
  
  
    | 
         
xen-devel
[Xen-devel] Re: [PATCH] xen: core dom0 support
 
H. Peter Anvin wrote:
 
Jeremy Fitzhardinge wrote:
 
H. Peter Anvin wrote:
 In this particular case, this is actually false.  "No PAT" in the 
processor is *not* the same thing as "no cacheability controls in 
the page tables".  Every processor since the 386 has had UC, WT, and 
WB controls in the page tables; PAT only added the ability to do WC 
(and WP, which we don't use).  Since the number of processors which 
can do WC at all but don't have PAT is a small set of increasingly 
obsolete processors, we may very well choose to simply ignore the WC 
capabilities of these particular processors. 
 
 I'm not quite sure what you're referring to with "this is actually 
false".  Certainly we support cachability control in ptes under Xen.  
We just don't support full PAT because Xen uses PAT for itself.
 
 
 What do you define as "full PAT"?  If what you mean is that Xen lays 
claims to the PAT MSR and only allows a certain mapping that's hardly 
a problem... other than that it's not an exhaustible resource so I 
guess I really don't understand what you're trying to say here.
 
 It does not allow guests to set their own PAT MSRs.  It can't easily be 
multiplexed either, as all CPUs must have the same settings for their 
PAT MSRs.  I guess it could be handled by allowing domains to set their 
own virtual PAT MSRs, and then rewriting the ptes to convert from the 
guest PAT settings to Xen's, but I don't know if this is possible in 
general (and it poses some problems because the pte modifications would 
be guest-visible).
   J
_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel
 
 |   
 
 | 
    | 
  
  
    |   | 
    |