I've got a question about this code.
static inline void evtchn_set_pending(struct domain *d, int port)
{
shared_info_t *s = d->shared_info;
if ( !test_and_set_bit(port, &s->evtchn_pending[0]) &&
!test_bit (port, &s->evtchn_mask[0]) &&
!test_and_set_bit(port>>5, &s->evtchn_pending_sel) )
{
/* The VCPU pending flag must be set /after/ update to
evtchn-pend. */
s->vcpu_data[0].evtchn_upcall_pending = 1;
guest_async_callback(d);
}
}
So you'll get an upcall IFF: the bit 'port' in evtchn_pending WAS 0, the
bit 'port' in the mask IS 0, and the bit 'port >> 5' in the
evtchn_pending_sel WAS 0.
OK, here's my question: suppose the first test_and_set_bit fails because
the bit in evtchn_pending[0] was already set? You'll never get called,
that's what, as far as I can tell. And this is exactly what I'm seeing.
I've got bits 0,1,2 set in evtchn_pending, but the guest_async_callback is
never happening, since the test_and_set_bit returns 1. I'm missing an
interrupt, due to a plethora of debug prints in my kernel, and I'm not
seeing another one.
To me, it looks like I'm exercising a race condition in this function
shown above.
Here is my question: why isn't this code something like:
static inline void evtchn_set_pending(struct domain *d, int port)
{
shared_info_t *s = d->shared_info;
set_bit(port, &s->evtchn_pending[0]);
if ( !test_bit (port, &s->evtchn_mask[0]) &&
!test_and_set_bit(port>>5, &s->evtchn_pending_sel) )
{
/* The VCPU pending flag must be set /after/ update to
evtchn-pend. */
s->vcpu_data[0].evtchn_upcall_pending = 1;
guest_async_callback(d);
}
}
In other words, I don't see the reason for the first test_and_set_bit,
given that the bit may have been set by an earlier call to
evtchn_set_pending, masked by the mask, and then the next time you call
the first test_and_set_bit will fail.
So, what's the reason for that first TAS?
thanks
ron
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