[PATCH v4 11/28] x86emul: support TILEZERO

[Jan Beulich <jbeulich@xxxxxxxx>]

This is relatively straightforward, and hence best suited to introduce a
few other wider use pieces.

Testing of this will be added once a sensible test can be put together,
i.e. when support for at least TILELOADD (to allow loading non-zero
values in the first place) is also there.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
v4: Use X86_EXC_*. Fold tiles_configured() into tile_valid(). Re-base.
v3: New.

--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -1346,6 +1346,7 @@ static const struct vex {
     { { 0x49, 0x00 }, 2, F, R, pfx_no, W0, L0 }, /* ldtilecfg */
     { { 0x49, 0x00 }, 2, F, W, pfx_66, W0, L0 }, /* sttilecfg */
     { { 0x49, 0xc0 }, 2, F, N, pfx_no, W0, L0 }, /* tilerelease */
+    { { 0x49, 0xc0 }, 2, F, N, pfx_f2, W0, L0 }, /* tilezero */
     { { 0x50 }, 2, T, R, pfx_no, W0, Ln }, /* vpdpbuud */
     { { 0x50 }, 2, T, R, pfx_66, W0, Ln }, /* vpdpbusd */
     { { 0x50 }, 2, T, R, pfx_f3, W0, Ln }, /* vpdpbsud */
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -97,8 +97,37 @@ static const uint16_t _3dnow_ext_table[1
 /* Shift values between src and dst sizes of pmov{s,z}x{b,w,d}{w,d,q}. */
 static const uint8_t pmov_convert_delta[] = { 1, 2, 3, 1, 2, 1 };
 
+static void sttilecfg(struct x86_tilecfg *tilecfg)
+{
+    /* sttilecfg (%rdi) */
+    asm volatile ( ".byte 0xc4, 0xe2, 0x79, 0x49, 0x07"
+                   : "=m" (*tilecfg) : "D" (tilecfg) );
+}
+
 #define PALETTE_AMX 1
 
+#define PALETTE(pal...) TOK_OR(1U << PALETTE_, ## pal)
+
+static bool tile_valid(unsigned int tile, const struct x86_tilecfg *tilecfg,
+                       unsigned int palettes)
+{
+    switch ( tilecfg->palette )
+    {
+    case PALETTE_AMX:
+        return (palettes & PALETTE(AMX)) && tile < ARRAY_SIZE(tilecfg->colsb) 
&&
+               /*
+                * Considering the checking LDTILECFG does, checking either 
would
+                * in principle suffice.
+                */
+               tilecfg->colsb[tile] && tilecfg->rows[tile];
+
+    default:
+        break;
+    }
+
+    return false;
+}
+
 #endif /* !X86EMUL_NO_SIMD */
 
 static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 };
@@ -6640,6 +6669,28 @@ x86_emulate(
         }
         goto unrecognized_insn;
 
+    case X86EMUL_OPC_VEX_F2(0x0f38, 0x49):
+        generate_exception_if(!mode_64bit() || vex.l || vex.w, X86_EXC_UD);
+        if ( ea.type == OP_REG )
+        {
+            switch ( modrm_rm & 7 )
+            {
+            case 0: /* tilezero */
+                vcpu_must_have(amx_tile);
+                get_fpu(X86EMUL_FPU_tile);
+                sttilecfg(&mmvalp->tilecfg);
+                generate_exception_if(!tile_valid(modrm_reg, &mmvalp->tilecfg,
+                                                  PALETTE(AMX)),
+                                      X86_EXC_UD);
+                op_bytes = 1; /* fake */
+                goto simd_0f_common;
+
+            default:
+                goto unrecognized_insn;
+            }
+        }
+        goto unrecognized_insn;
+
     case X86EMUL_OPC_VEX   (0x0f38, 0x50): /* vpdpbuud 
[xy]mm/mem,[xy]mm,[xy]mm */
     case X86EMUL_OPC_VEX_F3(0x0f38, 0x50): /* vpdpbsud 
[xy]mm/mem,[xy]mm,[xy]mm */
     case X86EMUL_OPC_VEX_F2(0x0f38, 0x50): /* vpdpbssd 
[xy]mm/mem,[xy]mm,[xy]mm */