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RE: [Xen-ia64-devel] pv_ops: IVT.s replacement to cover all sensitiveins

To: "Akio Takebe" <takebe_akio@xxxxxxxxxxxxxx>, <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-ia64-devel] pv_ops: IVT.s replacement to cover all sensitiveinstructions
From: "Dong, Eddie" <eddie.dong@xxxxxxxxx>
Date: Fri, 21 Mar 2008 16:58:41 +0800
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Thread-topic: [Xen-ia64-devel] pv_ops: IVT.s replacement to cover all sensitiveinstructions
Akio Takebe wrote:
> Hi, Eddie
> 
>> diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
>> index f2306ae..d516bf4 100644
>> --- a/arch/ia64/kernel/ivt.S
>> +++ b/arch/ia64/kernel/ivt.S
>> @@ -19,6 +19,7 @@
>>  * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
>>  *                    VA Linux Systems Japan K.K.
>>  *                    pv_ops.
>> + *      Yaozu (Eddie) Dong <eddie.dong@xxxxxxxxx>
>>  */
>> /*
>>  * This file defines the interruption vector table used by the CPU.
>> @@ -338,7 +339,7 @@ ENTRY(alt_itlb_miss)
>>      DBG_FAULT(3)
>>      MOV_FROM_IFA(r16)       // get address that caused the TLB miss
movl
>> r17=PAGE_KERNEL -    MOV_FROM_IPSR(r21)
>> +    MOV_FROM_IPSR(p0,r21)
> Why do you specify p0 to the macro?
> Is it not neccessary to perform the mov?

Originally it is just mov, but there is a place it needs a Pred, see 
alt_dtlb_miss in ivt.S. So the MACRO in inst.h is replaced with a pred, 
Or do u mean we keep seperate MACRO for with Pred?.
Actually p0 is default pred for all(default) instruction, so post
compile code is same.

Thanks, eddie

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