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xen-ia64-devel

RE: [Xen-ia64-devel] [PATCH] implemented vcpu_ptc_l()

To: "Isaku Yamahata" <yamahata@xxxxxxxxxxxxx>, "Magenheimer, Dan \(HP Labs Fort Collins\)" <dan.magenheimer@xxxxxx>
Subject: RE: [Xen-ia64-devel] [PATCH] implemented vcpu_ptc_l()
From: "Dong, Eddie" <eddie.dong@xxxxxxxxx>
Date: Wed, 7 Dec 2005 12:35:26 +0800
Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
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Thread-topic: [Xen-ia64-devel] [PATCH] implemented vcpu_ptc_l()
Yamahata san:
        vhpt_flush also needs to be metaphysical rr safe.
Eddie

Isaku Yamahata wrote:
> On Tue, Dec 06, 2005 at 08:16:13AM -0800, Magenheimer, Dan (HP Labs
> Fort Collins) wrote: 
> 
>> However, one other possible problem:  Around the call to
>> ia64_local_tlb_purge, I think you need to check if rr0
>> needs to be swapped (see similar code in vcpu_itc_i()).
> 
> attached patch.
> vcpu_ptc_ga() seems to have same problem. I also fixed it.
> 
> 
> Signed-off-by Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
> 
> vcpu_ptc_l() and vcpu_ptc_ga() should be aware of metaphysical mode.
> 
> diff -r 13e0bf5113b9 -r ea3a4ab59710 xen/arch/ia64/xen/vcpu.c
> --- a/xen/arch/ia64/xen/vcpu.c        Tue Dec  6 17:01:21 2005 +0900
> +++ b/xen/arch/ia64/xen/vcpu.c        Wed Dec  7 12:27:07 2005 +0900
> @@ -1828,6 +1828,8 @@
>  IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 addr_range)
>  {
>       extern void ia64_local_tlb_purge (unsigned long start, unsigned
> long end, unsigned long nbits); +     BOOLEAN swap_rr0 = (!(vadr >>
> VRN_SHIFT) && +                           PSCB(vcpu,
metaphysical_mode));
> 
>       //printk("##### vcpu_ptc_l(%p, %"PRIx64", %"PRIx64")\n",
>       //      vcpu, vadr, addr_range);
> @@ -1840,7 +1842,9 @@
>  #ifdef VHPT_GLOBAL
>       vhpt_flush_address(vadr, addr_range);   
>  #endif
> +     if (swap_rr0) set_one_rr(0x0, PSCB(vcpu, rrs[0]));
>       ia64_local_tlb_purge(vadr, vadr + addr_range, PAGE_SHIFT);
> +     if (swap_rr0) set_metaphysical_rr0();
>       vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb));
>       vcpu_purge_tr_entry(&PSCBX(vcpu,itlb));
>       return IA64_NO_FAULT;
> @@ -1894,6 +1898,9 @@
>  IA64FAULT vcpu_ptc_ga(VCPU *vcpu,UINT64 vadr,UINT64 addr_range)
>  {
>       extern ia64_global_tlb_purge(UINT64 start, UINT64 end, UINT64
> nbits); +     BOOLEAN swap_rr0 = (!(vadr >> VRN_SHIFT) &&
> +                         PSCB(vcpu, metaphysical_mode));
> +
>       // FIXME: validate not flushing Xen addresses
>       // if (Xen address) return(IA64_ILLOP_FAULT);
>       // FIXME: ??breaks if domain PAGE_SIZE < Xen PAGE_SIZE
> @@ -1901,7 +1908,9 @@
>  #ifdef VHPT_GLOBAL
>       vhpt_flush_address(vadr,addr_range);
>  #endif
> +     if (swap_rr0) set_one_rr(0x0,PSCB(vcpu, rrs[0]));
>       ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT);
> +     if (swap_rr0) set_metaphysical_rr0();
>       vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb));
>       vcpu_purge_tr_entry(&PSCBX(vcpu,itlb));
>       return IA64_NO_FAULT;


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