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Re: [Xen-ia64-devel] RE: vcpu_translate issue

To: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Subject: Re: [Xen-ia64-devel] RE: vcpu_translate issue
From: Matt Chapman <matthewc@xxxxxxxxxxxxxxx>
Date: Fri, 11 Nov 2005 17:02:28 +1100
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On Thu, Nov 10, 2005 at 05:02:52PM +0800, Tian, Kevin wrote:
> 
> >I think delivering a TLB miss is not sufficient.  Because the
> >mapping for the zero page is indeed in Linux's pagetable, the TLB
> >miss handler succeeds in finding and inserting it, and the page
> >fault handler is not triggered.
> 
> Actually that depends. Only when short format vhpt entry exists in TLB
> which contains that mapping for zero page, low level TLB miss handler
> can hit it. Or else the flow still goes to C code page fault handler,
> right? 

Yes, the C page fault handler is invoked if it's not in the pagetable.
But as far as Linux is concerned, there is a valid read-only VMA at
address 0, so the C page fault handler won't raise a fault on read, it
will simply insert a read-only mapping in the page table.

So, a write to the zero page will result in an access fault and
termination of the process.  A read from the zero page will succeed
(incorrectly).  But that doesn't explain why it now hangs there.

The more important problem seems to be that itc inserts into the wrong
region when we're metaphysical, so the execution flow is like this:

1. [rr0=X] guest accesses address 0 -> fault
2. [rr0=X] Xen accesses VHPT at 0x1fffff000000000 -> deliver IA64_VHPT_FAULT
3. guest switches to metaphysical to walk pagetable
4. [rr0=mprid] guest inserts translation for 0 and 0x1fffff0000000000
5. guest returns to virtual mode (rfi)
6. [rr0=X] goto 1

Matt


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