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Re: [Xen-devel] [PATCH] xen: provide pse36 cpuid bit

To: Tim Deegan <tim@xxxxxxx>
Subject: Re: [Xen-devel] [PATCH] xen: provide pse36 cpuid bit
From: Keir Fraser <keir@xxxxxxx>
Date: Thu, 27 Oct 2011 16:30:00 +0100
Cc: Christoph Egger <Christoph.Egger@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
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Thread-topic: [Xen-devel] [PATCH] xen: provide pse36 cpuid bit
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On 27/10/2011 16:15, "Tim Deegan" <tim@xxxxxxx> wrote:

> If you mean this:
> 
>  * PSE disabled / PSE36
>  * We don't support any modes other than PSE enabled, PSE36 disabled.
>  * Neither of those would be hard to change, but we'd need to be able to
>  * deal with shadows made in one mode and used in another.
>
> the worry was that we'd need a whole nother shadow mode to handle the
> case where one VCPU was in normal 32-bit and another was in PSE36 (since
> they can't share shadows).
> 
> As it happens the current code does detect PSE-disabled in shadow mode
> but just DTRT for the current VCPU, so a mix of PSE-enabled and
> PSE-disabled VCPUs will get unpredicatble results from shadow
> pagetables. :(
> 
> Which means that supporting PSE36 to the same degree (i.e. assuming all
> VCPUs behave the same, or if they don't they don't share pagetables)
> would be OK too. :)

Ah, I see. Yes, I guessed it would be supported to just the same degree as
'basic' PSE. The likelihood of pagetables being shared across different
pagetable-related CR4 settings? Not great, we hope. :-)

 -- Keir



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