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Re: [Xen-devel] AMD IOMMU intremap tables and IOAPICs

To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Subject: Re: [Xen-devel] AMD IOMMU intremap tables and IOAPICs
From: George Dunlap <George.Dunlap@xxxxxxxxxxxxx>
Date: Tue, 6 Sep 2011 16:57:38 +0100
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On Tue, Sep 6, 2011 at 4:54 PM, Andrew Cooper <andrew.cooper3@xxxxxxxxxx> wrote:
> On 06/09/11 16:47, George Dunlap wrote:
>> Wei,
>>
>> Quick question:  Am I reading the code correctly, that even with
>> per-device interrupt remap tables, that GSIs are accounted to the
>> intremap table of the corresponding IOAPIC, presumably because the
>> IOMMU sees interrupts generated as GSIs as coming from the IOAPIC?  In
>> that case, then we need all devices sharing the same IOAPIC must not
>> have any vector collisions.  Is that correct?
>
> Based on the ICH10 IO-APIC documentation with respect to auto EOIs, we
> cant have any two IRQs across any IO-APICs sharing a vector,
> irrespective of IOMMU or not.  (Because the EOI'ing an IO-APIC entry
> only takes account of vector and not destination)
>
> If we were to disable the auto EOI broadcast and do manual EOI'ing (only
> available on newer versions of the local apic) then we could reduce that
> restriction to "no two IRQs in the same IO-APIC may share a vector".

Hmm, so it sounds like enforcing non-sharing of vectors within a
single IOAPIC is something we probably want to do even when we're not
using an AMD IOMMU?

 -George

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