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Re: [Xen-devel] TPR write optimization (even improves 2003 sp2)

To: James Harper <james.harper@xxxxxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-devel] TPR write optimization (even improves 2003 sp2)
From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date: Thu, 08 Jan 2009 09:08:27 +0000
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On 08/01/2009 03:53, "James Harper" <james.harper@xxxxxxxxxxxxxxxx> wrote:

> One (big?) hiccup... how do I make sure that I am accessing the vlapic
> structure for the correct CPU? My current idea of vlapic[current_cpu] is
> flawed because a thread switch could occur between getting the address
> of the vlapic structure for the current cpu and writing a value to the
> mapped register.
> 
> Is it possible to have per-cpu mapping?

No.

> Does disabling interrupts via cli cause a VMEXIT?

No.

 K.



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