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Re: [Xen-devel] [PATCH] hvm: live migration between intel and amd

To: Jean Guyader <jean.guyader@xxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] hvm: live migration between intel and amd
From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date: Fri, 13 Jun 2008 17:08:23 +0100
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On 13/6/08 16:46, "Jean Guyader" <jean.guyader@xxxxxxxxxxxxx> wrote:

> +    /* Do we come from AMD processor ? */
> +    if ( data->msr_flags == -1ULL )
> +    {
> +        data->msr_flags = 0x7ULL;
> +
> +        data->ldtr_limit = 0xffffffff;
> +        data->ldtr_arbytes = 0xc00;
> +
> +        data->cs_arbytes = 0xc9b;
> +
> +        data->gs_limit = 0xffffffff;
> +        data->gs_arbytes = 0xc00;
> +
> +        data->tr_arbytes = 0x8b;
> +    }
> +

It's a bit rude to trample register state like this. Why do limits need to
be forced? The Intel manuals do not specify that any vm-entry checks are
applied to segment limits outside of vm86 mode.

 -- Keir



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