Hi, Keir,
When reading vHPET’s code, I find the following in hpet_write function:
case HPET_T2_CMP:
tn = (addr - HPET_T0_CMP) >> 5;
if ( timer_is_32bit(h, tn) )
new_val = (uint32_t)new_val;
if ( !timer_is_periodic(h, tn) ||
(h->hpet.timers[tn].config & HPET_TN_SETVAL) )
h->hpet.timers[tn].cmp = new_val;
else
h->hpet.period[tn] = new_val;
Here hpet.period is updated only when timer 0 is in periodic mode and SET_VAL is not set. But from HPET spec 1.0a, I can not find the reason. The spec provides a recommended sequence to reset main counter and comparator.
If the software resets the main counter, the value in the comparator’s value register needs to reset as well. This can be done by setting the n_VAL_SET_CNF bit. Again, to avoid race conditions, this should be done with the main counter halted. The following usage model is expected:
1) Software clears the GLOBAL_ENABLE_CNF bit to prevent any interrupts
2) Software Clears the main counter by writing a value of 00000000h to it.
3) Software sets the TIMER0_VAL_SET_CNF bit.
4) Software writes the new value in the TIMER0_COMPARATOR_VAL register
5) Software sets the GLOBAL_ENABLE_CNF bit to enable interrupts.
What will the result is system software only writes the comparator once after set SET_VAL like the above sequence?
Can you give me some hints? Thanks in advance!
Best Regards
Haitao Shan
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