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RE: [Xen-devel] possible to give/switch direct graphics hw access to dom

To: "Muli Ben-Yehuda" <muli@xxxxxxxxxx>
Subject: RE: [Xen-devel] possible to give/switch direct graphics hw access to doms?
From: "Petersson, Mats" <Mats.Petersson@xxxxxxx>
Date: Thu, 4 May 2006 13:43:14 +0200
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx, Jean Blignaut <jean@xxxxxxxxxxx>
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Thread-topic: [Xen-devel] possible to give/switch direct graphics hw access to doms?
> -----Original Message-----
> From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx 
> [mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of 
> Muli Ben-Yehuda
> Sent: 04 May 2006 12:32
> To: Petersson, Mats
> Cc: xen-devel@xxxxxxxxxxxxxxxxxxx; Jean Blignaut
> Subject: Re: [Xen-devel] possible to give/switch direct 
> graphics hw access to doms?
> 
> On Thu, May 04, 2006 at 01:26:21PM +0200, Petersson, Mats wrote:
> 
> > The solution is an IOMMU device, which is basicly a 
> translation system 
> > to translate a "fake physical" to "actual physical" 
> address. There is 
> > a GART in the AMD x86-64 processors that COULD be used for this 
> > purpose, but currently there's no code to support this [although I 
> > believe it's being worked on].
> 
> Does gart provide a 0-based IO space? I don't recall that it 
> does. Or do you have in mind a scheme where a 0-based IO 
> address isn't necessary?

The GART allows TRANSLATION of DMA-accesses from PCI-space to physical
RAM, just like a "proper" IOMMU. I'm sure there are some limitations,
and it may not actually work for graphics cards that are able to DMA
from just about anywhere in the guest memory space - and the mapping
would need to be set up by the hypervisor before-hand, so we can't just
map it on a fault in some way or another. 

I know that we're working on a "proper" IOMMU that will be in some
future generation of AMD processors - I don't know which generation
these will be in, but it's NOT the ones coming shortly, that's for
sure... 

--
Mats
> 
> Cheers,
> Muli
> 
> _______________________________________________
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> 
> 


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