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RE: [Xen-devel] Essay on an important Xen decision (long)

To: "Mark Williamson" <mark.williamson@xxxxxxxxxxxx>, "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Subject: RE: [Xen-devel] Essay on an important Xen decision (long)
From: "Magenheimer, Dan (HP Labs Fort Collins)" <dan.magenheimer@xxxxxx>
Date: Mon, 16 Jan 2006 14:56:53 -0800
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Thread-topic: [Xen-devel] Essay on an important Xen decision (long)
> > To make it clearer, this hardware PT walker on IA64 is not 
> like normal
> > multi-level PT walker on x86. Instead it can be a virtually 
> linear table,
> > or a hash table which is configurable. ;-)
> 
> Am I right in thinking it's also possible to implement 
> "software filled TLB"  
> on IA64? (as a fallback for when the hardware assist fails?).  

Not only possible, but normal.  If there is a TLB miss and
a VHPT (virtual hashed page table) miss, software fills
both the TLB and VHPT.

Is that what you meant?

Dan

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