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Re: [Xen-devel] [patch] pae: tlbflush linear page table updates

To: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Subject: Re: [Xen-devel] [patch] pae: tlbflush linear page table updates
From: Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>
Date: Fri, 12 Aug 2005 10:17:41 +0100
Cc: Gerd Knorr <kraxel@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxx
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On 12 Aug 2005, at 10:02, Tian, Kevin wrote:

Is similar fix also required by __put_user_64?


#define __put_user_u64(x, addr, retval, errret)                 \
        : "=r"(retval)                                  \
    : "A" (x), "r" (addr), "i"(errret), "0"(retval))

I'm not sure exact rules for compiler to choose registers. But once
compiler optimizes retval or addr to reuse eax/edx under some condition,
user will also see either incorrect return value, or incorrect content
written to incorrect address. Can we assume such optimization never

The compiler will never alias inputs. In this case it is forced to alias the output constraint with input retval, and so the output cannot alias with any other input (which would be an error).

 -- Keir

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