# HG changeset patch
# User Jan Beulich <jbeulich@xxxxxxxxxx>
# Date 1304939894 -3600
# Node ID 60070af3777d3b030668e8f91e1d6b5e97b59bba
# Parent 408e9e1f4eefd4cc879bb294b55bc05cfd9934bc
x86: set ARAT feature flag for non-buggy AMD CPUs
This is the equivalent of a recent Linux change.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
xen-unstable changeset: 23290:1ac7336b6298
xen-unstable date: Sun May 01 10:14:15 2011 +0100
---
diff -r 408e9e1f4eef -r 60070af3777d xen/arch/x86/cpu/amd.c
--- a/xen/arch/x86/cpu/amd.c Mon May 09 12:17:17 2011 +0100
+++ b/xen/arch/x86/cpu/amd.c Mon May 09 12:18:14 2011 +0100
@@ -608,6 +608,10 @@
}
#endif
+ /* As a rule processors have APIC timer running in deep C states */
+ if (c->x86 >= 0xf && !cpu_has_amd_erratum(c, AMD_ERRATUM_400))
+ set_bit(X86_FEATURE_ARAT, c->x86_capability);
+
/* Prevent TSC drift in non single-processor, single-core platforms. */
if ((smp_processor_id() == 1) && c1_ramping_may_cause_clock_drift(c))
disable_c1_ramping();
diff -r 408e9e1f4eef -r 60070af3777d xen/include/asm-x86/amd.h
--- a/xen/include/asm-x86/amd.h Mon May 09 12:17:17 2011 +0100
+++ b/xen/include/asm-x86/amd.h Mon May 09 12:18:14 2011 +0100
@@ -134,6 +134,10 @@
AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf), \
AMD_MODEL_RANGE(0x12, 0x0, 0x0, 0x1, 0x0))
+#define AMD_ERRATUM_400 \
+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), \
+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf))
+
struct cpuinfo_x86;
int cpu_has_amd_erratum(const struct cpuinfo_x86 *, int, ...);
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