Hi,
I also solved it without new GFW.
This patch is a little bit dirty hacking.
Should I wait for new GFW?
Thanks,
Kouya
Zhang, Xing Z writes:
> Yes, it can fix.
> But it should work with new GFW. We will send it out soon.
>
> Good good study,day day up ! ^_^
> -Wing(zhang xin)
>
> OTC,Intel Corporation
diff -r 56caf0e37e6a xen/arch/ia64/vmx/vlsapic.c
--- a/xen/arch/ia64/vmx/vlsapic.c Mon Mar 26 10:10:31 2007 -0600
+++ b/xen/arch/ia64/vmx/vlsapic.c Tue Mar 27 11:07:58 2007 +0900
@@ -57,6 +57,8 @@
extern void vmx_reflect_interruption(u64 ifa, u64 isr, u64 iim,
u64 vector, REGS *regs);
+extern void vmx_sal_return(VCPU *vcpu);
+
static void update_last_itc(vtime_t *vtm, uint64_t cur_itc)
{
vtm->last_itc = cur_itc;
@@ -708,6 +710,8 @@ static void vlsapic_write_ipi(VCPU *vcpu
vcpu_init_regs(targ);
targ_regs->cr_iip = d->arch.sal_data->boot_rdv_ip;
targ_regs->r1 = d->arch.sal_data->boot_rdv_r1;
+ /* Jump to b0 raises Unimpl Inst Addr trap. */
+ targ_regs->b0 = (unsigned long)vmx_sal_return;
if (test_and_clear_bit(_VCPUF_down,&targ->vcpu_flags)) {
vcpu_wake(targ);
diff -r 56caf0e37e6a xen/arch/ia64/vmx/vmx_process.c
--- a/xen/arch/ia64/vmx/vmx_process.c Mon Mar 26 10:10:31 2007 -0600
+++ b/xen/arch/ia64/vmx/vmx_process.c Tue Mar 27 11:07:58 2007 +0900
@@ -77,6 +77,26 @@ static u64 vec2off[68] = {0x0,0x400,0x80
};
+/*
+ * SAL Return state from OS_BOOT_RENDEZ
+ */
+void vmx_sal_return(struct vcpu *v)
+{
+ struct domain *d = v->domain;
+
+ printk(XENLOG_INFO "DOM%d/VCPU%d: going offline.\n",
+ d->domain_id, v->vcpu_id);
+
+ set_bit(_VCPUF_down, &v->vcpu_flags);
+ vcpu_sleep_nosync(v);
+
+ /* never return to guest context. */
+ for (;;) {
+ raise_softirq(SCHEDULE_SOFTIRQ);
+ do_softirq();
+ }
+}
+
void vmx_reflect_interruption(u64 ifa, u64 isr, u64 iim,
u64 vec, REGS *regs)
@@ -86,8 +106,12 @@ void vmx_reflect_interruption(u64 ifa, u
u64 vpsr = VCPU(vcpu, vpsr);
vector = vec2off[vec];
- if(!(vpsr&IA64_PSR_IC)&&(vector!=IA64_DATA_NESTED_TLB_VECTOR)){
- panic_domain(regs, "Guest nested fault vector=%lx!\n", vector);
+ if (!(vpsr&IA64_PSR_IC)) {
+ if (vector == IA64_LOWERPRIV_TRANSFER_TRAP_VECTOR &&
+ (isr&(1<<4)) != 0 && regs->cr_iip == (u64)vmx_sal_return)
+ vmx_sal_return(vcpu);
+ if (vector != IA64_DATA_NESTED_TLB_VECTOR)
+ panic_domain(regs, "Guest nested fault vector=%lx!\n", vector);
}
switch (vec) {
diff -r 56caf0e37e6a xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c Mon Mar 26 10:10:31 2007 -0600
+++ b/xen/arch/ia64/xen/vcpu.c Tue Mar 27 11:07:58 2007 +0900
@@ -174,6 +174,9 @@ void vcpu_init_regs(struct vcpu *v)
INT_ENABLE_OFFSET(v);
VCPU(v, itv) = (1 << 16); /* timer vector masked */
}
+
+ /* to prevent a Reserved Field fault */
+ VCPU(v, pta) = 0x3c;
v->arch.domain_itm_last = -1L;
}
_______________________________________________
Xen-ia64-devel mailing list
Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-ia64-devel
|