Re: [Xen-ia64-devel] vIOSAPIC and IRQs delivery

[Kenji Kaneshige <kaneshige.kenji@xxxxxxxxxxxxxx>]

Hi,

Tristan Gingold wrote:
> Le Jeudi 09 Mars 2006 01:31, Luck, Tony a écrit :
>
> > > BTW, I think it will be *very* hard to find an ia64 platform which can
> > > share an IRQ line.  Maybe I am wrong but I don't know such a platform :-(
> > Hard? No.
> I'd like to have a vendor name and a platform name!
Fujitsu PRIMEQUEST can have so many (> 512) gsi sources and it
needs shared IRQ (vector). Note that what I'm talking is not
sharing IRQ lines but sharing interrupt vector between multiple
RTEs.

> > Expensive? Yes.
> >
> > There are only 255 irqs - minus some that the base kernel steals
> > for cmc, mca, timer, perfmon, etc.  So any large system with a
> > few hundred i/o cards _must_ share irqs.  There aren't enough
> > for one each.
> I don't agree.  You can have interrupt domains.  See "Intel Itanium Processor 
> Family Interrupt Architecture Guide".
As you said, interrupt domains approach is better because

   - Shared IRQ (vector) approach would not work for
     edge-triggered interrupts including MSIs.

   - Interrupt domains approach would have much better
     performance

Unfortunately, AFAIK, interrupt domains approach has not be
implemented for generic ia64-linux kernel yet. It would be
very nice if it is implemented someday. But I guess we need
a lot of efforts for it. To tell the truth, I've posted the
patches for interrupt domains to ia64-linux mailing list
before, though it contains many TBDs and bugs (maybe).
Please see the following URL if necessary.

http://marc.theaimsgroup.com/?l=linux-ia64&m=112133320424016&w=2

Thanks,
Kenji Kaneshige

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