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RE: [Xen-ia64-devel] vIOSAPIC and IRQs delivery

To: "Alex Williamson" <alex.williamson@xxxxxx>, "Magenheimer, Dan \(HP Labs Fort Collins\)" <dan.magenheimer@xxxxxx>
Subject: RE: [Xen-ia64-devel] vIOSAPIC and IRQs delivery
From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Date: Thu, 9 Mar 2006 06:20:19 +0800
Cc: Tristan Gingold <Tristan.Gingold@xxxxxxxx>, xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
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Thread-topic: [Xen-ia64-devel] vIOSAPIC and IRQs delivery
>From: Alex Williamson
>Sent: 2006年3月9日 4:56
>
>   Hopefully I'm not stepping into a rat-hole here, but what are we
>defining as a shared IRQ?  If we're only talking about running out of
>external interrupt vectors on the CPU and programming multiple IOSAPIC
>RTEs to trigger the same vector, I agree.  That case requires are rather
>large system.  Eventually we should support this, but things like
>interrupt domains may be a better long term solutions.
>
>   There's also the case where due to hardware design decisions,
>functions within a PCI device or multiple PCI devices may be hard wired
>to pull the same interrupt lines.  In this case, multiple devices may
>interrupt on the same IOSAPIC RTE.  This is probably pretty rare on ia64
>systems today, maybe even limited to multi-function PCI devices.  I
>wouldn't expect multiple high speed devices to share an interrupt line
>though, so supporting this should have minimal impact on the non-shared
>interrupt path.
>
>       Alex
>

So the irq sharing that we're talking about actually includes both cases, 
and that's why we propose to do sharing at irq level (in irq_desc) instead 
of RTE level. That way can handle both, either wired to same irq line or 
wired to different line with RTEs set as same vector. As I said in reply to 
Dan, the overhead can be negligible if we do it right.

Thanks,
Kevin

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