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RE: [Xen-ia64-devel] [PATCH] translate_domain_pte must handle ED bit
| To: | "Magenheimer, Dan \(HP Labs Fort Collins\)" <dan.magenheimer@xxxxxx>, "Isaku Yamahata" <yamahata@xxxxxxxxxxxxx>, "Tian, Kevin" <kevin.tian@xxxxxxxxx> |
|---|---|
| Subject: | RE: [Xen-ia64-devel] [PATCH] translate_domain_pte must handle ED bit |
| From: | "Xu, Anthony" <anthony.xu@xxxxxxxxx> |
| Date: | Thu, 23 Feb 2006 10:17:00 +0800 |
| Cc: | xen-ia64-devel@xxxxxxxxxxxxxxxxxxx |
| Delivery-date: | Thu, 23 Feb 2006 02:17:19 +0000 |
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| Thread-topic: | [Xen-ia64-devel] [PATCH] translate_domain_pte must handle ED bit |
>FYI, I was hoping that some day we might be able to use some ignored >bits to indicate the contiguous block size that the page belongs >to. E.g. even if the page is 16K, if it is part of an aligned >contiguous block of 64K where phys==machine, the larger block size >could be put into the TLB. This obviously was never implemented >(and could cause extra flushing overhead if the p2m mapping changed >for any of the "sub pages" so may not even be advantageous). > >Dan Dan, "Contiguous" is a very interesting topic. Could you share more your thought about this? Thanks, -Anthony _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel |
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