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RE: [Xen-devel] [PATCH] mask cpuid TSC invariant bit for various circums

To: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>, "Xen-Devel (E-mail)" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-devel] [PATCH] mask cpuid TSC invariant bit for various circumstances (Take 2)
From: Dan Magenheimer <dan.magenheimer@xxxxxxxxxx>
Date: Fri, 6 Nov 2009 06:23:24 -0800 (PST)
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> On 05/11/2009 21:50, "Dan Magenheimer" 
> <dan.magenheimer@xxxxxxxxxx> wrote:
> > Mask cpuid TSC invariant bit for some circumstances
> > and expose it for others.  On upstream Linux kernels,
> > non-zero Invariant TSC bit permanently selects TSC
> > as the clocksource (currently on Intel only).  When
> > these kernels run on Xen, when migration is possible
> > and TSC is unemulated, this can cause much weirdness.
> > But exposing non-zero Invariant TSC has performance
> > advantages so we want to expose it when it is safe.
> > (Note leaving it exposed/unexposed for dom0 is not an
> > issue.)
> I think I pushed you into changing this in a way I like even 
> less. :-) I can
> live with your original patch, so I'll check that in after all.
>  -- Keir

But note that you were correct that the original patch
didn't work with HVM domains, I presume because the xc cpuid
policy code doesn't initialize 0x80000007.  That's why
I pulled the code out of the loop in domain_cpuid and
then entirely out to time.c


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