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Re: [Xen-devel] [PATCH] vmx: correct EIP value of task-state segment

To: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] vmx: correct EIP value of task-state segment
From: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
Date: Mon, 24 Aug 2009 11:28:16 +0900
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Hi Keir,

Thanks for remembering. 
It looks good. And our proprietary OS works fine.
Thanks a lot.

Nonsupporting the AMD SVM case is no problem for us.
The OS is embedded to an Intel platform and
we have no plan to use an AMD platform.


Keir Fraser writes:
> Hi Kouya,
> I applied an extended version of your patch as c/s 20097. It should do the
> right thing for task switches triggered by ExtInt, NMI, or hardware
> exception (i.e, not update EIP in those cases). It would be good if you
> could take a look and also test.
> It's worth noting that I did not fix the AMD SVM case as that is rather
> trickier. This is because SVM does not provide the instruction length, so we
> would have to decode it ourselves. And the instruction can be a fairly
> arbitrary JMPF/CALLF variant, so we would have to smarten up the SVM
> insn-len decoder considerably (to decode effective addresses, for example),
> or go into x86_emulate() and have that properly emulate task switches.
> Neither is an attractive work item. :-) If I had to pick one I'd probably go
> for a smarter insn-len decoder, even though that's aesthetically perhaps
> more 'hacky'. But someone who cares can go do the work.
>  -- Keir
> On 31/07/2009 02:19, "Kouya Shimura" <kouya@xxxxxxxxxxxxxx> wrote:
> > Major OSes(Linux, windows, ...) don't seem to use task switching.
> > So this bug is missed.
> > 
> > Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
> > 

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