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Re: [Xen-devel] [PATCH] vmx: correct EIP value of task-state segment

To: Kouya Shimura <kouya@xxxxxxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] vmx: correct EIP value of task-state segment
From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date: Thu, 20 Aug 2009 13:40:32 +0100
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Thread-topic: [Xen-devel] [PATCH] vmx: correct EIP value of task-state segment
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Hi Kouya,

I applied an extended version of your patch as c/s 20097. It should do the
right thing for task switches triggered by ExtInt, NMI, or hardware
exception (i.e, not update EIP in those cases). It would be good if you
could take a look and also test.

It's worth noting that I did not fix the AMD SVM case as that is rather
trickier. This is because SVM does not provide the instruction length, so we
would have to decode it ourselves. And the instruction can be a fairly
arbitrary JMPF/CALLF variant, so we would have to smarten up the SVM
insn-len decoder considerably (to decode effective addresses, for example),
or go into x86_emulate() and have that properly emulate task switches.
Neither is an attractive work item. :-) If I had to pick one I'd probably go
for a smarter insn-len decoder, even though that's aesthetically perhaps
more 'hacky'. But someone who cares can go do the work.

 -- Keir

On 31/07/2009 02:19, "Kouya Shimura" <kouya@xxxxxxxxxxxxxx> wrote:

> Major OSes(Linux, windows, ...) don't seem to use task switching.
> So this bug is missed.
> Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>

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