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Re: [Xen-devel] million cycle interrupt

To: Dan Magenheimer <dan.magenheimer@xxxxxxxxxx>, "Tian, Kevin" <kevin.tian@xxxxxxxxx>, "Xen-Devel (E-mail)" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-devel] million cycle interrupt
From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date: Tue, 14 Apr 2009 07:30:42 +0100
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On 14/04/2009 05:23, "Dan Magenheimer" <dan.magenheimer@xxxxxxxxxx> wrote:

>> If it's really caused by SMT, it's more likely to be software
>> caused resource contention due to doubled logical processors.
> You mentioned PIT earlier... I wonder if PIT can be
> read in parallel if read from different cores, but
> if read from different threads, it must be serialized?
> A million cycles is probably about right for a platform
> timer read, true?

You could validate that quite easily by adding your own timer read wrapped
in TSC reads. Actually a PIT read, even though it requires multiple accesses
over the ISA bus, should take less than 10us.

 -- Keir

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