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Re: [Xen-devel] [RFC][Patches] Xen 1GB Page Table Support

To: Dan Magenheimer <dan.magenheimer@xxxxxxxxxx>
Subject: Re: [Xen-devel] [RFC][Patches] Xen 1GB Page Table Support
From: Gianluca Guida <glguida@xxxxxxxxx>
Date: Fri, 20 Mar 2009 14:59:40 +0100
Cc: Gianluca.guida@xxxxxxxxxxxxx, xen-devel@xxxxxxxxxxxxxxxxxxx, George Dunlap <george.dunlap@xxxxxxxxxxxxx>, Wei Huang <wei.huang2@xxxxxxx>, Tim Deegan <Tim.Deegan@xxxxxxxxxxxxx>, Keir Fraser <Keir.Fraser@xxxxxxxxxxxxx>
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On Fri, Mar 20, 2009 at 2:40 PM, Dan Magenheimer
<dan.magenheimer@xxxxxxxxxx> wrote:
> Interesting.  And non-intuitive.  I think you are saying
> that, at least theoretically (and using your ABCD, not
> my ABC below), A is always faster than
> (B | C), and (B | C) is always faster than D.  Taking into
> account the fact that the TLB size is fixed (I think),
> C will always be faster than B and never slower than D.

Changing the p2m of course won't help in the shadow pagetables case. :/
The 'good' news is that I *think* after recent measures that in
current shadow pagetables a better utilization of the TLB entries
(e.g. setting the PSE bits in the shadows, which is possible after the
2Mb p2m entries) per se doesn't affects performance *at all*.

I will soon have a very small patch that would, if my current analysis
is correct, improve performance in applications using 2Mb pages
without setting PSE in shadows. I'll just need some people helping me
with testing it on these kind of applications.

Thanks,
Gianluca

-- 
It was a type of people I did not know, I found them very strange and
they did not inspire confidence at all. Later I learned that I had been
introduced to electronic engineers.
                                                  E. W. Dijkstra

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