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Re: [Xen-devel] [PATCH 0/6] MSI-INTx interrupt translation for HVM

To: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH 0/6] MSI-INTx interrupt translation for HVM
From: Shohei Fujiwara <fujiwara-sxa@xxxxxxxxxxxxxxx>
Date: Mon, 02 Mar 2009 16:19:03 +0900
Cc: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, Qing He <qing.he@xxxxxxxxx>
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Thank you for your reply.

On Sun, 01 Mar 2009 14:55:21 +0000
Keir Fraser <keir.fraser@xxxxxxxxxxxxx> wrote:

> On 27/02/2009 02:41, "Shohei Fujiwara" <fujiwara-sxa@xxxxxxxxxxxxxxx> wrote:
>
> > I found hypervisor doesn't issue EOI before injecting the
> > interrupt to guest domain, if MSI isn't maskable.
> > The 2nd interrupt may be lost. What do you think about this?
>
> The second interrupt should not be lost! It should be marked in the local
> APIC's IRR bitmap and should hence cause an interrupt to fire as soon as the
> in-service interrupt is EOIed (and hence cleared from the local APIC's ISR
> bitmap).

I understand that we don't need to issue EOI before injecting the
interrupt to guest domain.

> Are you thus *sure* this is really the root-cause of your problem?

When I was reading the code on Friday, I found the hypervisor doesn't
issue EOI before injecting the interrupt to guest domain. This seemed
to be different from Qing's explanation, and then I made the question.
So I have no real problem.


Today, I found the hypervisor issues EOI ASAP. So Qing's explanation
reflected the implementation of the hypervisor.

xen/drivers/passthrough/io.c:
void hvm_dirq_assist(struct vcpu *v)
{
...
            if ( hvm_irq_dpci->mirq[irq].flags & HVM_IRQ_DPCI_TRANSLATE )
            {
                /* for translated MSI to INTx interrupt, eoi as early as 
possible */
                __msi_pirq_eoi(d, irq);
            }

Thanks,
--
Shohei Fujiwara

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