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RE: [Xen-devel] RE: [PATCH]xend: fix a typo in pci.py

To: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
Subject: RE: [Xen-devel] RE: [PATCH]xend: fix a typo in pci.py
From: "Cui, Dexuan" <dexuan.cui@xxxxxxxxx>
Date: Mon, 2 Mar 2009 10:45:05 +0800
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Cc: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
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Thread-topic: [Xen-devel] RE: [PATCH]xend: fix a typo in pci.py
Hi Kouya,
Thanks for pointing this out. I didn't remember the time correctly.  :-)
I'll update the patch.

-- Dexuan

-----Original Message-----
From: Kouya Shimura [mailto:kouya@xxxxxxxxxxxxxx] 
Sent: 2009年3月2日 9:21
To: Cui, Dexuan
Cc: Keir Fraser; xen-devel@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Xen-devel] RE: [PATCH]xend: fix a typo in pci.py

Cui, Dexuan writes:
> 2) When performing reset, we should sleep at least 100ms; in current code, 
> it's incorrect somewhere we sleep 0.2s and somewhere 0.01s.

As long as I read "PCI Bus Power Management Interface Spec Rev 1.2",
the state transition recovery time across D3hot/D0 is 10ms.
Is it really neeeded to sleep 100ms?
In the case of FLR, 100ms should be necessary.

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