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Re: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid bi

To: "Tian, Kevin" <kevin.tian@xxxxxxxxx>, "Wei, Gang" <gang.wei@xxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus
From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date: Fri, 05 Dec 2008 10:13:22 +0000
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On 05/12/2008 10:05, "Tian, Kevin" <kevin.tian@xxxxxxxxx> wrote:

>> From: Tian, Kevin
>> Sent: Friday, December 05, 2008 6:00 PM
>> 
>> Then if we agree always aligning TSC to absolute platform timer
>> counter, it doesn't make difference to use cpu_khz or local tsc_scale
>> since both are using scale factor calculated within a small period
>> to represent the underlying crystal frequency.
>> 
> 
> Let me hold back above words. As you said, cpu_khz has lower accuracy
> by cutting down lowest bits.

Yes. Also bear in mind that absolute ongoing synchronisation between TSCs
*does not matter*. Xen will happily synchronise system time on top of
(slowly enough, constantly enough) diverging TSCs, and of course HVM VCPUs
re-set their guest TSC offset when moving between host CPUs.

What *does* matter is the possibility of warping a host TSC value on wake
from deep sleep, compared with its value if the sleep had never happened. In
this case, system time will be wrong (since we haven't been through a
calibration step since waking up) and HVM timers will be wrong. And using
start-of-day timestamp plus cpu_khz makes this more likely. The correct
thing to do is obey the most recent set of local calibration values.

 -- Keir



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