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[Xen-devel] [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc sk
| To: | "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx> |
|---|---|
| Subject: | [Xen-devel] [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus |
| From: | "Wei, Gang" <gang.wei@xxxxxxxxx> |
| Date: | Fri, 5 Dec 2008 14:22:45 +0800 |
| Accept-language: | en-US |
| Acceptlanguage: | en-US |
| Cc: | Keir Fraser <keir.fraser@xxxxxxxxxxxxx> |
| Delivery-date: | Thu, 04 Dec 2008 22:23:29 -0800 |
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| Thread-index: | AclWoeM2xc+X6mj6QOaQHsyxDmpzag== |
| Thread-topic: | [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus |
Originally, the sequence for each cpu is [tsc-save, entry deepC, break-evt, exit deepC, tsc-restore], the system error is quite easy to be accumulated. Once the workloads between cpus are not balanced, the tsc skew between cpus will eventually become bigger & begger - more than 10 seconds can be observed. Now, we just keep a initial stamp via cstate_init_stamp during the booting/s3 resuming, which is based on the platform stime. All cpus need only to do tsc-restore relative to the initial stamp after exit deepC. The base is fixed, and is the same for all cpus, so it can avoid accumulated tsc-skew. Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>
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