Re: [Xen-devel] [PATCH][HVM] fix PCI interrupt routing via ACPI

[Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>]

On 14/10/06 12:27 am, "Wang, Winston L" <winston.l.wang@xxxxxxxxx> wrote:

> That’s true, if we have more than 4  PCI devices need IRQ, then have to share, it is doesn’t matter how many PRT package entry you added for each device in pic mode, only have 4  IRQ  to use.
>  
> And in APIC mode, IRQ is not routed through south bridge PCI IRQ router for IOAPIC, those four PCI routers are for 8259 PIC. Current QEMU using INT1_0/15 to IRQ0/15 one to one mapping, but that does not mean no APIC mode support, if we have bug we have to fix.
>  
> I think (b) is a short term solution, if we upgrade south bridge from PIIX3/4 to newer ICHx, we could have 8 PIC mode PCI IRQ router and 24 IOAPIC IRQ in APIC mode. I think IPF platform already support 24 IOAPIC  IRQs now.

Or, could we simply:
 1. throw away the PCI-ISA bridge device (from qemu and from the ACPI DSDT)
 2. throw away the legacy ‘$PIR’ routing table in rombios.c
 3. initialise the IRQ field of each PCI device config space to sane unique values
 4. Make ACPI PRTP static and match the values chosen in (3).
 5. Also throw away all the LNK stuff from ACPI DSDT

If we’re allowed to do this (programmable PCI-ISA bridge isn’t part of MP or ACPI specs, for example) then this seems to involve throwing away a load of tedious code and thus removing an IRQ-mapping bottleneck. No drawbacks, unless I’m ignorant of some PC architectural detail (quite possible)?

 -- Keir



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