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Re: [Xen-devel] HPET/PIT timer accuracy

On 29 Jul 2005, at 19:29, Ian Pratt wrote:

We're not relying on TSC synchronisation between CPUs. They
can run at different frequencies, stop in deep sleep, and so
on. But we *do* want the frequency of each one to be as
stable as possible. I'd expect to get <1ppm stability from a
crystal source at constant temperature, no problem.

I'd wager the TSC is stable and it's the HPET that's wandering...

We'll probably just have to add more damping on the re-calibration.

I haven't done any further tests to see how low the frequency of wandering goes. Perhaps we'll find the platform timer is more stable over e.g., 60s periods.

 -- Keir

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