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[Xen-devel] HPET/PIT timer accuracy

To: xen-devel List <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: [Xen-devel] HPET/PIT timer accuracy
From: Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>
Date: Fri, 29 Jul 2005 18:26:13 +0100
Cc: Ian Pratt <m+Ian.Pratt@xxxxxxxxxxxx>
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Does anyone on this list have an idea of expected accuracy of chipset time sources (e.g., PIT/HPET)? I've been looking at relative frequency stability of the CPU-local TSC and platform HPET on a few different systems, and see weird instabilities that I cannot explain.

On a couple of systems based on Intel E7520 (Lindenhurst) chipset I see the relative frequency is stable to within a couple of parts per million (which is within measurement error). Either the two are clocked from the same crystal, or two crystals with low frequency drift/wander (but not unexpectedly low -- I don't think crystals should drift over short time periods).

In contrast, two different systems based on AMD 8111 chipset perform very badly. The relative frequency of TSC vs HPET is stable only to within +/- 30ppm! This means that, during one second, timers based on these two sources can diverge by around 30us, which is a *lot*. Clearly the TSC and HPET are driven off different time sources, but I almost cannot believe that both are driven off crystals -- one of the two must have a 1Hz frequency drift/wander of 30ppm which is totally outside the specs I'd expect of a crystal source.

Any ideas what could be going on?! This is something of a pain for the new time code, which syncs the local TSCs to the chipset timer....

 -- Keir

(I am talking frequency stability here, by the way, not frequency tolerance. I know a crystal can be 100s of ppm out of whack from what is stamped on the can, but I think over short time periods it should not drift noticeably from its natural frequency).

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