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RE: [Xen-devel] RE: x86_64 SMP support (status update)

To: "Chris Wright" <chrisw@xxxxxxxx>
Subject: RE: [Xen-devel] RE: x86_64 SMP support (status update)
From: "Li, Xin B" <xin.b.li@xxxxxxxxx>
Date: Thu, 30 Jun 2005 09:24:19 +0800
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx, "Nakajima, Jun" <jun.nakajima@xxxxxxxxx>
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Thread-topic: [Xen-devel] RE: x86_64 SMP support (status update)
Chris Wright wrote:
> Yes, here it is, there's only one line change (sorry, I
> thought this 
> change was in the last one).  This should get you to
> faulting on the 
> first CPU (which is actually progress ;-).  I think the
> second CPU is 
> happliy idling in cpu_idle, and the first one is back to
> finishing up 
> booting when it dies.

Chris, cpu_gdt_table in latest bk has only 15 entries, I think that's
not correct.
/* The TLS descriptors are currently at a different place compared to
   Hopefully nobody expects them at a fixed place (Wine?) */
        .quad   0x0000000000000000      /* NULL descriptor */
        .quad   0x008ffa000000ffff      /* __KERNEL_COMPAT32_CS */      
        .quad   0x00affa000000ffff      /* __KERNEL_CS */
        .quad   0x00cff2000000ffff      /* __KERNEL_DS */
        .quad   0x00cffa000000ffff      /* __USER32_CS */
        .quad   0x00cff2000000ffff      /* __USER_DS, __USER32_DS  */

        .quad   0x00affa000000ffff      /* __USER_CS */
        .quad   0x00cffa000000ffff      /* __KERNEL32_CS */        
        .quad   0,0                     /* TSS */
        .quad   0                       /* LDT */
        .quad   0,0,0                   /* three TLS descriptors */ 
        .quad   0                       /* unused now */

        /* asm/segment.h:GDT_ENTRIES must match this */ 
        /* This should be a multiple of the cache line size */
        /* GDTs of other CPUs: */       
        .fill (GDT_SIZE * NR_CPUS) - (gdt_end - cpu_gdt_table)

On x86_64, GDT_SIZE = GDT_ENTRIES * 8, and GDT_ENTRIES = 16. seems we
missed one LDT entry here comparing to native x86_64 linux kernel.


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