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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 18/30] x86emul: support APX+ADX insns
They're straight counterparts, just encoded differently.
While extending the test harness also replace the numeric literals by
more readable expressions involving #define-s we have available now.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -1098,6 +1098,11 @@ static const struct test apx_nci[] = {
#undef CONDS
+static const struct test adx[] = {
+ INSN(adcx, 66, map4, 66, el, dq, no),
+ INSN(adox, f3, map4, 66, el, dq, no),
+};
+
static const unsigned char vl_all[] = { VL_512, VL_128, VL_256 };
static const unsigned char vl_128[] = { VL_128 };
static const unsigned char vl_no128[] = { VL_512, VL_256 };
@@ -1662,6 +1667,20 @@ void evex_disp8_test(void *instr, struct
vl_128, ARRAY_SIZE(vl_128), instr, ctxt);
printf("okay\n");
+#define RUN(feat) do { \
+ if ( cpu_has_ ## feat ) \
+ { \
+ printf("%-40s", "Testing APX-F+" #feat " disp8 handling..."); \
+ test_group(feat, ARRAY_SIZE(feat), \
+ vl_128, ARRAY_SIZE(vl_128), instr, ctxt); \
+ printf("okay\n"); \
+ } \
+ } while ( false )
+
+ RUN(adx);
+
+#undef RUN
+
cpu_policy.apx.apx_nci_ndd_nf = nci_ndd_nf;
ctxt->force_writeback = wb;
}
--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -2187,6 +2187,8 @@ static const struct evex {
CND(0x40, 2, T, R, pfx_no, Wn, L0, ND ), /* {,cf}cmov<cc> */ \
CND(0x40, 2, T, R, pfx_66, Wn, L0, ND ), /* {,cf}cmov<cc> */ \
CND(0x40, 2, T, W, pfx_f2, WIG, L0 ), /* set<cc> */
+ { { 0x66 }, 2, T, R, pfx_66, Wn, L0 }, /* adcx */
+ { { 0x66 }, 2, T, R, pfx_f3, Wn, L0 }, /* adox */
{ { 0x69 }, 6, T, R, pfx_no, Wn, L0 }, /* imul */
{ { 0x69 }, 4, T, R, pfx_66, W0, L0 }, /* imul */
{ { 0x69 }, 6, T, R, pfx_66, W1, L0 }, /* imul */
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -2999,7 +2999,7 @@ int main(int argc, char **argv)
"[dst1]" (0), "[dst2]" (0) );
set_insn(adx);
- regs.eflags = 0x2d6;
+ regs.eflags = EFLAGS_MASK & ~X86_EFLAGS(CF, OF);
of = cf = i = 0;
while ( (rc = x86_emulate(&ctxt, &emulops)) == X86EMUL_OKAY )
{
@@ -3011,9 +3011,9 @@ int main(int argc, char **argv)
*/
if ( i < ARRAY_SIZE(data) * 2 && !(i % 4) )
{
- if ( regs.eflags & 0x001 )
+ if ( regs.eflags & X86_EFLAGS_CF )
++cf;
- if ( regs.eflags & 0x800 )
+ if ( regs.eflags & X86_EFLAGS_OF )
++of;
}
if ( !valid_eip(adx) )
@@ -3022,9 +3022,69 @@ int main(int argc, char **argv)
if ( (rc != X86EMUL_OKAY) ||
i != ARRAY_SIZE(data) * 4 + 2 || cf != 1 || of != 5 ||
regs.eax != 0xffffffff || regs.ecx || regs.edx != 0xffffffff ||
- !check_eip(adx) || regs.eflags != 0x2d6 )
+ !check_eip(adx) ||
+ regs.eflags != (EFLAGS_MASK & ~X86_EFLAGS(CF, OF)) )
goto fail;
printf("okay\n");
+
+#ifdef __x86_64__
+ if ( cpu_has_apx_nci_ndd_nf )
+ {
+ /* Same data, but using eGPR-s. */
+ decl_insn(adx_apx);
+
+ printf("%-40s", "Testing APX adcx/adox ...");
+ asm volatile ( put_insn(adx_apx,
+ ".Lloop%=:\n\t"
+ /* mov %[cnt], %r18 */
+ ".byte 0xd5, 0x18, 0x89, 0xca\n\t"
+ /* adcx (%[addr]), %r30d */
+ ".byte 0x62, 0x64, 0x7d, 0x08, 0x66,
0x36\n\t"
+ /* adox
-%c[full]-%c[elem](%[addr],%r18,2*%c[elem]), %k[dst2] */
+ ".byte 0x62, 0xf4, 0x7a, 0x08, 0x66\n\t"
+ ".byte 0x54, 0xd6, -%c[full]-%c[elem]\n\t"
+ "lea %c[elem](%[addr]),%[addr]\n\t"
+ "loop .Lloop%=\n\t"
+ /* adcx %[cnt], %r30d, %eax */
+ ".byte 0x62, 0x64, 0x7d, 0x18, 0x66,
0xf1\n\t"
+ /* adox %[cnt], %k[dst2], %r17d */
+ ".byte 0x62, 0xf4, 0x76, 0x10, 0x66,
0xd1\n\t")
+ : [addr] "=S" (regs.esi), [dst2] "=d" (regs.edx),
+ [cnt] "=c" (regs.ecx)
+ : [full] "i" (sizeof(data)), [elem] "i"
(sizeof(*data)),
+ "[addr]" (data), "[cnt]" (ARRAY_SIZE(data)),
+ "[dst2]" (0) );
+
+ set_insn(adx_apx);
+ load_egpr(30, 0);
+ of = cf = i = 0;
+ while ( (rc = x86_emulate(&ctxt, &emulops)) == X86EMUL_OKAY )
+ {
+ ++i;
+ /* See comment above. */
+ if ( i < ARRAY_SIZE(data) * 2 + ARRAY_SIZE(data) / 2 &&
+ !(i % 5) )
+ {
+ if ( regs.eflags & X86_EFLAGS_CF )
+ ++cf;
+ if ( regs.eflags & X86_EFLAGS_OF )
+ ++of;
+ }
+ if ( !valid_eip(adx_apx) )
+ break;
+ }
+ if ( (rc != X86EMUL_OKAY) ||
+ i != ARRAY_SIZE(data) * 5 + 2 || cf != 1 || of != 5 ||
+ !check_eip(adx_apx) ||
+ regs.rax != 0xffffffffU || regs.rcx ||
+ regs.rdx != 0xffffffffU ||
+ !check_egpr(17, 0xffffffffU) || !check_egpr(18, 1) ||
+ !check_egpr(30, 0xffffffffU) ||
+ regs.eflags != (EFLAGS_MASK & ~X86_EFLAGS(CF, OF)) )
+ goto fail;
+ printf("okay\n");
+ }
+#endif
}
printf("%-40s", "Testing bextr $0x0a03,(%ecx),%ebx...");
--- a/tools/tests/x86_emulator/x86-emulate.h
+++ b/tools/tests/x86_emulator/x86-emulate.h
@@ -180,6 +180,7 @@ void wrpkru(unsigned int val);
xcr0_mask(0xe6))
#define cpu_has_avx512dq (cpu_policy.feat.avx512dq && \
xcr0_mask(0xe6))
+#define cpu_has_adx cpu_policy.feat.adx
#define cpu_has_avx512_ifma (cpu_policy.feat.avx512_ifma && \
xcr0_mask(0xe6))
#define cpu_has_avx512cd (cpu_policy.feat.avx512cd && \
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -691,6 +691,10 @@ static const struct map4_table {
[vex_f2] = { .to_mem = true, .byte = true, .nd = true,
.nci_ndd_nf = true },
},
+ [0x66] = {
+ [vex_66] = { .nd = true }, /* ADCX */
+ [vex_f3] = { .nd = true }, /* ADOX */
+ },
[0x69] = { /* IMUL */
[vex_np] = { .immW = true, .nd = true, .nf = true,
.nci_ndd_nf = true },
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -7433,6 +7433,8 @@ x86_emulate(
case X86EMUL_OPC_66(0x0f38, 0xf6): /* adcx r/m,r */
case X86EMUL_OPC_F3(0x0f38, 0xf6): /* adox r/m,r */
+ case X86EMUL_OPC_EVEX_66(4, 0x66): /* adcx r/m,r{,r} */
+ case X86EMUL_OPC_EVEX_F3(4, 0x66): /* adox r/m,r{,r} */
{
unsigned int mask = rep_prefix() ? X86_EFLAGS_OF : X86_EFLAGS_CF;
unsigned int aux = _regs.eflags & mask ? ~0 : 0;
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