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RE: [PATCH 3/3] xen/sched: Make cpu_nr_siblings() architecture-specific
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Hirokazu Takahashi <taka@xxxxxxxxxxxxx>
- Date: Fri, 12 Jun 2026 21:06:53 +0000
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- Cc: "Mykyta_Poturai@xxxxxxxx" <Mykyta_Poturai@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Dario Faggioli <dfaggioli@xxxxxxxx>, Juergen Gross <jgross@xxxxxxxx>, George Dunlap <gwd@xxxxxxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Fri, 12 Jun 2026 21:07:17 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHc+Moq7p2vtDgwUEGokWD7Uh66HLY5Z66AgAH4l0A=
- Thread-topic: [PATCH 3/3] xen/sched: Make cpu_nr_siblings() architecture-specific
Hello,
> > --- a/xen/common/sched/credit2.c
> > +++ b/xen/common/sched/credit2.c
> > @@ -29,22 +29,6 @@
> > /* #define d2printk printk */
> > @@ -884,8 +868,11 @@ cpu_runqueue_match(const struct csched2_runqueue_data
> > *rqd, unsigned int cpu)
> > * Additional checks, to avoid separating siblings in different runqueues.
> > * This deals with both Intel's HTs and AMD's CUs. An arch that does not
> > have
> > * any similar concept will just have cpu_nr_siblings() always return 1,
> > and
> > - * setup the cpu_sibling_mask-s acordingly (as currently does ARM), and
> > things
> > - * will just work as well.
> > + * setup the cpu_sibling_mask-s acordingly, and things will just work as
> > well.
> > + *
> > + * TODO: Abstract cpu_nr_siblings properly, and figure out what Credit2
> > wants
> > + * to do with the fact that x86_num_siblings doesn't even have the
> > same
> > + * meaning between x86 vendors.
>
> Hmm, the "abstract properly" part is being addressed by this patch. Why would
> you keep saying it needs addressing in the comment you move?
Oaky, I shouldn't have left the "abstract properly" part. I will delete it.
Additionally, I will update this comment block to explicitly mention ARM's
SMT topology alongside Intel's HTs and AMD's CUs.
Thank you,
Hirokazu Takahashi
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