[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 16/17] Handle PCIe ECAM space access from guests


  • To: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • From: Thierry Escande <thierry.escande@xxxxxxxxxx>
  • Date: Fri, 12 Jun 2026 12:02:08 +0200
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID"
  • Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Delivery-date: Fri, 12 Jun 2026 10:02:15 +0000
  • Feedback-id: default:8631fc262581453bbf619ec5b2062170:Sweego
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 4/29/26 14:42, Roger Pau Monné wrote:
> On Fri, Mar 13, 2026 at 04:35:05PM +0000, Thierry Escande wrote:
>> This patch adds the logic to decode MMIO-based PCIe ECAM accesses. If
>> the IOREQ_TYPE_COPY request is within the ECAM address space configured
>> by hvmloader, the ioreq type is set to XEN_DMOP_IO_RANGE_PCI and the
>> sbdf decoded from the accessed address.
>>
>> Signed-off-by: Thierry Escande <thierry.escande@xxxxxxxxxx>
>> ---
>>  xen/arch/x86/hvm/ioreq.c | 15 +++++++++++++++
>>  1 file changed, 15 insertions(+)
>>
>> diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c
>> index a5fa97e149..022fe05222 100644
>> --- a/xen/arch/x86/hvm/ioreq.c
>> +++ b/xen/arch/x86/hvm/ioreq.c
>> @@ -268,6 +268,8 @@ bool arch_ioreq_server_get_type_addr(const struct domain 
>> *d,
>>                                       uint64_t *addr)
>>  {
>>      unsigned int cf8 = d->arch.hvm.pci_cf8;
>> +    unsigned long mmio_start = (p->type == IOREQ_TYPE_COPY) ?
>> +                                ioreq_mmio_first_byte(p) : 0;
>>  
>>      if ( p->type != IOREQ_TYPE_COPY && p->type != IOREQ_TYPE_PIO )
>>          return false;
>> @@ -298,6 +300,19 @@ bool arch_ioreq_server_get_type_addr(const struct 
>> domain *d,
>>                  *addr |= CF8_ADDR_HI(cf8);
>>          }
>>      }
>> +    else if ( p->type == IOREQ_TYPE_COPY &&
>> +              (mmio_start >= d->arch.ecam_addr &&
>> +               mmio_start < (d->arch.ecam_addr + d->arch.ecam_size)) )
>> +    {
>> +        pci_sbdf_t sbdf;
>> +        unsigned int reg = mmio_start & ~PAGE_MASK;
>> +
>> +        sbdf.bdf =  (((mmio_start - d->arch.ecam_addr) & 0x0ffff000) >> 12);
>> +        sbdf.seg = 0;
>> +
>> +        *type = XEN_DMOP_IO_RANGE_PCI;
>> +        *addr = ((uint64_t)sbdf.sbdf << 32) | reg;
> 
> The trapping & decoding here should better re-use the logic in the
> vpci_mmcfg* handlers in x86/hvm/io.c.  You might want to gate the call
> to register_mmio_handler() to the domain having vPCI, so that
> otherwise it will be handled by the IOREQ catch-all.  It's a bit
> hacky, but we already know that vPCI and IOREQs don't play well, and
> it needs solving properly.  Again I don't want to force you having to
> do that just to get q35 merged.  But we should at least aim to not
> duplicate the data in the domain structures.

I missed that part about vPCI and HVM. AFAIR it was not possible to use
vPCI for HVM domains. I'll take a deeper look and see if that mmcfg
handling could be reused.

Regards,



--
Thierry Escande | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.