[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3 1/2] x86/svm: Add Enumerations for the SVM virtual NMI



Le 15/02/2026 à 19:24, Abdelkareem Abdelsaamad a écrit :
> Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD
> platforms. The feature support is indicated by the CPUID
> Fn8000_000A_EDX[25] = 1.
>
> Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the
> VMCB structure's vintr_t:
>
> vintr_t(11) - Virtual NMI is pending.
> vintr_t(12) - Virtual NMI is masked.
> vintr_t(26) - Enable NMI virtualization.
>
> Signed-off-by: Abdelkareem Abdelsaamad <abdelkareem.abdelsaamad@xxxxxxxxxx>
> ---
>   xen/arch/x86/hvm/svm/vmcb.h        | 8 ++++++--
>   xen/arch/x86/include/asm/hvm/svm.h | 2 ++
>   2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h
> index 69f6047394..047483db9a 100644
> --- a/xen/arch/x86/hvm/svm/vmcb.h
> +++ b/xen/arch/x86/hvm/svm/vmcb.h
> @@ -336,13 +336,17 @@ typedef union
>           u64 tpr:          8;
>           u64 irq:          1;
>           u64 vgif:         1;
> -        u64 rsvd0:        6;
> +        u64 rsvd0:        1;
> +        u64 vnmi_pending: 1;
> +        u64 vnmi_blocking:1;
> +        u64:              3;
>           u64 prio:         4;
>           u64 ign_tpr:      1;
>           u64 rsvd1:        3;
>           u64 intr_masking: 1;
>           u64 vgif_enable:  1;
> -        u64 rsvd2:        6;
> +        u64 vnmi_enable:  1;
> +        u64 rsvd2:        5;
>           u64 vector:       8;
>           u64 rsvd3:       24;
>       } fields;
> diff --git a/xen/arch/x86/include/asm/hvm/svm.h 
> b/xen/arch/x86/include/asm/hvm/svm.h
> index 15f0268be7..a35a61273b 100644
> --- a/xen/arch/x86/include/asm/hvm/svm.h
> +++ b/xen/arch/x86/include/asm/hvm/svm.h
> @@ -37,6 +37,7 @@ extern u32 svm_feature_flags;
>   #define SVM_FEATURE_VGIF          16 /* Virtual GIF */
>   #define SVM_FEATURE_SSS           19 /* NPT Supervisor Shadow Stacks */
>   #define SVM_FEATURE_SPEC_CTRL     20 /* MSR_SPEC_CTRL virtualisation */
> +#define SVM_FEATURE_VNMI          25 /* Virtual NMI */
>   #define SVM_FEATURE_BUS_LOCK      29 /* Bus Lock Threshold */
>
>   static inline bool cpu_has_svm_feature(unsigned int feat)
> @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat)
>   #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
>   #define cpu_has_svm_sss       cpu_has_svm_feature(SVM_FEATURE_SSS)
>   #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL)
> +#define cpu_has_svm_vnmi      cpu_has_svm_feature(SVM_FEATURE_VNMI)
>   #define cpu_has_svm_bus_lock  cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK)
>
>   #define MSR_INTERCEPT_NONE    0

Reviewed-by: Teddy Astie <teddy.astie@xxxxxxxxxx>


--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech





 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.