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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v7 03/12] xen/arm: gic-v3: Implement GICv3 suspend/resume functions
On Wed, Dec 31, 2025 at 5:35 PM Julien Grall <julien@xxxxxxx> wrote:
>
> Hi,
>
> On 26/12/2025 12:39, Julien Grall wrote:
> > Hi Mykola,
> >
> > On 11/12/2025 18:43, Mykola Kvach wrote:
> >> From: Mykola Kvach <mykola_kvach@xxxxxxxx>
> >>
> >> System suspend may lead to a state where GIC would be powered down.
> >> Therefore, Xen should save/restore the context of GIC on suspend/resume.
> >>
> >> Note that the context consists of states of registers which are
> >> controlled by the hypervisor. Other GIC registers which are accessible
> >> by guests are saved/restored on context switch.
> >>
> >> Signed-off-by: Mykola Kvach <mykola_kvach@xxxxxxxx>
> >> ---
> >> Changes in V7:
> >> - restore LPI regs on resume
> >> - add timeout during redist disabling
> >> - squash with suspend/resume handling for GICv3 eSPI registers
> >> - drop ITS guard paths so suspend/resume always runs; switch missing ctx
> >> allocation to panic
> >> - trim TODO comments; narrow redistributor storage to PPI icfgr
> >> - keep distributor context allocation even without ITS; adjust resume
> >> to use GENMASK(31, 0) for clearing enables
> >> - drop storage of the SGI configuration register, as SGIs are always
> >> edge-triggered
> >> ---
> >> xen/arch/arm/gic-v3-lpi.c | 3 +
> >> xen/arch/arm/gic-v3.c | 319 ++++++++++++++++++++++++-
> >> xen/arch/arm/include/asm/gic_v3_defs.h | 1 +
> >> 3 files changed, 320 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c
> >> index de5052e5cf..61a6e18303 100644
> >> --- a/xen/arch/arm/gic-v3-lpi.c
> >> +++ b/xen/arch/arm/gic-v3-lpi.c
> >> @@ -391,6 +391,9 @@ static int cpu_callback(struct notifier_block
> >> *nfb, unsigned long action,
> >> switch ( action )
> >> {
> >> case CPU_UP_PREPARE:
> >> + if ( system_state == SYS_STATE_resume )
> >> + break;
> >
> > Do we need this check because we don't free the LPI pending table when
> > the CPU is turned off?
> >
> > If so, don't we already have a problem for CPU hotplug because the
> > percpu area will be freed but not the pending table?
>
> Looking at [1], we don't seem to support CPU OFF when the GICv3 ITS is
> enabled. So this change could be delayed. But CC Mykyta for awareness.
Probably you are right. Another option is to move this
`system_state == SYS_STATE_resume` handling out of this change and into
the follow-up commit where ITS suspend/resume support is introduced, so
the rationale and behavior stay co-located with the suspend
implementation.
If you think the better approach is to avoid these changes for now,
I’m fine with that as well and can drop them in the next revision of
the series (and reintroduce them together with the ITS suspend).
Thanks,
Mykola
>
> Cheers,
>
> [1]
> https://lore.kernel.org/48bafdb8e6269a3d958065c6a1062ce2736632a0.1762939773.git.mykyta_poturai@xxxxxxxx
>
> >
> > Cheers,
> >
>
> --
> Julien Grall
>
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