Re: [Xen-devel] [PATCH v2 01/15] xen/arm: vgic-v3: Correctly set GICD_TYPER.IDbits

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Thu, 2015-01-29 at 18:25 +0000, Julien Grall wrote:
> From Linux 3.19, the GICv3 drivers is using GICD_TYPER.IDbits to check
> the validity of the hardware interrupt number.
> 
> The field IDBits in the register GICD_TYPER is used to know the number of
> interrupt identifiers (SPI, PPIs, SGIs, LPIs) supported by GIC Stream Protocol
> Interface.
> 
> This field contains the number of interrupt identifier bits minus one.
> 
> Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
> 
> ---
>     This patch should be backported to Xen 4.5. Without it any Linux
>     kernel > 3.19 won't boot as a Xen domain.
> 
>     I'm wondering if we should add a release note for this bug.
> 
>     Changes in v2:
>          - vgic_num_irqs has been introduced
>          - Drop GICD_TYPE_ID_BITS_MASK
>          - Use get_count_order
> ---
>  xen/arch/arm/vgic-v3.c            | 11 +++++++++++
>  xen/include/asm-arm/gic_v3_defs.h |  3 +++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index bece189..72b22ee 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -679,11 +679,22 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, 
> mmio_info_t *info)
>          vgic_unlock(v);
>          return 1;
>      case GICD_TYPER:
> +    {
> +        /*
> +         * Number of interrupt identifier bits supported by the GIC
> +         * Stream Protocol Interface
> +         */
> +        unsigned int irq_bits = get_count_order(vgic_num_irqs(v->domain));
> +
>          if ( dabt.size != DABT_WORD ) goto bad_width;
>          /* No secure world support for guests. */
>          *r = (((v->domain->max_vcpus << 5) & GICD_TYPE_CPUS ) |
>                ((v->domain->arch.vgic.nr_spis / 32) & GICD_TYPE_LINES));
> +
> +        *r |= (irq_bits - 1) << GICD_TYPE_ID_BITS_SHIFT;
> +
>          return 1;
> +    }
>      case GICD_STATUSR:
>          /*
>           *  Optional, Not implemented for now.
> diff --git a/xen/include/asm-arm/gic_v3_defs.h 
> b/xen/include/asm-arm/gic_v3_defs.h
> index 13adb53..85a6d79 100644
> --- a/xen/include/asm-arm/gic_v3_defs.h
> +++ b/xen/include/asm-arm/gic_v3_defs.h
> @@ -18,6 +18,9 @@
>  #ifndef __ASM_ARM_GIC_V3_DEFS_H__
>  #define __ASM_ARM_GIC_V3_DEFS_H__
>  
> +/* Additional bits in GICD_TYPER defined by GICv3 */
> +#define GICD_TYPE_ID_BITS_SHIFT 19

Please put this further down with the other bit definitions (i.e. below
the register definitions).

With that:
Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>



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